Message ID | 20220502163417.2635462-11-matthew.d.roper@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | i915: Introduce Ponte Vecchio | expand |
On Mon, 2022-05-02 at 09:34 -0700, Matt Roper wrote: > From: Lucas De Marchi <lucas.demarchi@intel.com> > > As we have more copy engines now, mask all of them from aux table > invalidate. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > index 0de17b568b41..f262aed94ef3 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > @@ -275,7 +275,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode) > if (!HAS_FLAT_CCS(rq->engine->i915) && > (rq->engine->class == VIDEO_DECODE_CLASS || > rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) { > - aux_inv = rq->engine->mask & ~BIT(BCS0); > + aux_inv = rq->engine->mask & ~GENMASK(BCS8, BCS0); > if (aux_inv) > cmd += 4; > }
On Mon, May 02, 2022 at 09:34:16AM -0700, Matt Roper wrote: > From: Lucas De Marchi <lucas.demarchi@intel.com> > > As we have more copy engines now, mask all of them from aux table > invalidate. > > Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > index 0de17b568b41..f262aed94ef3 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > @@ -275,7 +275,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode) > if (!HAS_FLAT_CCS(rq->engine->i915) && > (rq->engine->class == VIDEO_DECODE_CLASS || > rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) { > - aux_inv = rq->engine->mask & ~BIT(BCS0); > + aux_inv = rq->engine->mask & ~GENMASK(BCS8, BCS0); If we had defined I915_MAX_BCS earlier. We use ~GENMASK(BCS0 + I915_MAX_BCS - 1, BCS0), so we don't need to change this with the number of instances. Otherwise looks good to me. Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> > if (aux_inv) > cmd += 4; > } > -- > 2.35.1 >
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c index 0de17b568b41..f262aed94ef3 100644 --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c @@ -275,7 +275,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode) if (!HAS_FLAT_CCS(rq->engine->i915) && (rq->engine->class == VIDEO_DECODE_CLASS || rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) { - aux_inv = rq->engine->mask & ~BIT(BCS0); + aux_inv = rq->engine->mask & ~GENMASK(BCS8, BCS0); if (aux_inv) cmd += 4; }