[01/12] dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings

Commit Message

Chanho Park May 2, 2022, 9:02 a.m. UTC

Add dt-schema for Exynos Auto v9 SoC clock controller.

Signed-off-by: Chanho Park <[e-mail]>
---
 .../clock/samsung,exynosautov9-clock.yaml     | 217 ++++++++++++++++++
 1 file changed, 217 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml

Comments

Rob Herring May 2, 2022, 3:33 p.m. UTC | #1

On Mon, 02 May 2022 18:02:19 +0900, Chanho Park wrote:
> Add dt-schema for Exynos Auto v9 SoC clock controller.
> 
> Signed-off-by: Chanho Park <[e-mail]>
> ---
>  .../clock/samsung,exynosautov9-clock.yaml     | 217 ++++++++++++++++++
>  1 file changed, 217 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.example.dts:20:18: fatal error: dt-bindings/clock/exynosautov9.h: No such file or directory
   20 |         #include <dt-bindings/clock/exynosautov9.h>
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:364: Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1401: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Chanho Park May 2, 2022, 11:25 p.m. UTC | #2

> -----Original Message-----
> From: Rob Herring <[e-mail]>
> Sent: Tuesday, May 3, 2022 12:33 AM
> To: Chanho Park <[e-mail]>
> Cc: Tomasz Figa <[e-mail]>; Stephen Boyd <[e-mail]>;
> Sylwester Nawrocki <[e-mail]>; [e-mail];
> Rob Herring <[e-mail]>; Sam Protsenko
> <[e-mail]>; [e-mail]; Krzysztof
> Kozlowski <[e-mail]>; [e-mail];
> Alim Akhtar <[e-mail]>; Chanwoo Choi
> <[e-mail]>; Michael Turquette <[e-mail]>;
> Krzysztof Kozlowski <[e-mail]>
> Subject: Re: [PATCH 01/12] dt-bindings: clock: add Exynos Auto v9 SoC CMU
> bindings
> 
> On Mon, 02 May 2022 18:02:19 +0900, Chanho Park wrote:
> > Add dt-schema for Exynos Auto v9 SoC clock controller.
> >
> > Signed-off-by: Chanho Park <[e-mail]>
> > ---
> >  .../clock/samsung,exynosautov9-clock.yaml     | 217 ++++++++++++++++++
> >  1 file changed, 217 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yam
> > l
> >
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/clock/samsung,exynosautov9-
> clock.example.dts:20:18: fatal error: dt-bindings/clock/exynosautov9.h: No
> such file or directory
>    20 |         #include <dt-bindings/clock/exynosautov9.h>
>       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> compilation terminated.
> make[1]: *** [scripts/Makefile.lib:364:
> Documentation/devicetree/bindings/clock/samsung,exynosautov9-
> clock.example.dtb] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1401: dt_binding_check] Error 2
> 
> doc reference errors (make refcheckdocs):
> 
> See https://protect2.fireeye.com/v1/url?k=7dfbde9a-1d1943c7-7dfa55d5-
> 000babd9f1ba-7ad186e2087fa86f&q=1&e=efa8c437-0972-4987-b5b9-
> 27572ea7f351&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F
> 
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.

I need to adjust the patch order. The clock binding definitions patch should
be prior than others.
I'll apply this adjustment next patchset.

dt-bindings: clock: add clock binding definitions for Exynos Auto v9
dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings

Best Regards,
Chanho Park

Krzysztof Kozlowski May 3, 2022, 9:07 a.m. UTC | #3

On 02/05/2022 11:02, Chanho Park wrote:
> Add dt-schema for Exynos Auto v9 SoC clock controller.
> 
> Signed-off-by: Chanho Park <[e-mail]>
> ---
>  .../clock/samsung,exynosautov9-clock.yaml     | 217 ++++++++++++++++++
>  1 file changed, 217 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> new file mode 100644
> index 000000000000..e2a01f50db6c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> @@ -0,0 +1,217 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos Auto v9 SoC clock controller
> +
> +maintainers:
> +  - Chanho Park <[e-mail]>
> +  - Chanwoo Choi <[e-mail]>
> +  - Krzysztof Kozlowski <[e-mail]>
> +  - Sylwester Nawrocki <[e-mail]>
> +  - Tomasz Figa <[e-mail]>
> +
> +description: |
> +  Exynos Auto v9 clock controller is comprised of several CMU units, generating
> +  clocks for different domains. Those CMU units are modeled as separate device
> +  tree nodes, and might depend on each other. Root clocks in that clock tree are
> +  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
> +  Those external clocks must be defined as fixed-rate clocks in dts.
> +
> +  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> +  dividers; all other clocks of function blocks (other CMUs) are usually
> +  derived from CMU_TOP.
> +
> +  Each clock is assigned an identifier and client nodes can use this identifier
> +  to specify the clock which they consume. All clocks available for usage
> +  in clock consumer nodes are defined as preprocessor macros in
> +  'dt-bindings/clock/exynosautov9.h' header.

I know this follows Exynos850 pattern, but I would prefer to move towards:
1. vendor,device: samsung,exynosautov9.h
2. put here full path, so include/dt-bindings ....

> +
> +properties:
> +  compatible:
> +    enum:
> +      - samsung,exynosautov9-cmu-top
> +      - samsung,exynosautov9-cmu-busmc
> +      - samsung,exynosautov9-cmu-core
> +      - samsung,exynosautov9-cmu-fsys2
> +      - samsung,exynosautov9-cmu-peric0
> +      - samsung,exynosautov9-cmu-peric1
> +      - samsung,exynosautov9-cmu-peris
> +
> +  clocks:
> +    minItems: 1
> +    maxItems: 5
> +
> +  clock-names:
> +    minItems: 1
> +    maxItems: 5
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  reg:
> +    maxItems: 1
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-top
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-busmc
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_BUSMC bus clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_busmc_bus
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-core
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_CORE bus clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_core_bus
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-fsys2
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_FSYS2 bus clock (from CMU_TOP)
> +            - description: UFS clock (from CMU_TOP)
> +            - description: Ethernet clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_fsys2_bus
> +            - const: dout_fsys2_clkcmu_ufs_embd
> +            - const: dout_fsys2_clkcmu_ethernet
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-peric0
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_PERIC0 bus clock (from CMU_TOP)
> +            - description: PERIC0 IP clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_peric0_bus
> +            - const: dout_clkcmu_peric0_ip
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-peric1
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_PERIC1 bus clock (from CMU_TOP)
> +            - description: PERIC1 IP clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_peric1_bus
> +            - const: dout_clkcmu_peric1_ip
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov9-cmu-peris
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: External reference clock (26 MHz)
> +            - description: CMU_PERIS bus clock (from CMU_TOP)
> +
> +        clock-names:
> +          items:
> +            - const: oscclk
> +            - const: dout_clkcmu_peris_bus
> +
> +required:
> +  - compatible
> +  - "#clock-cells"
> +  - clocks
> +  - clock-names
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  # Clock controller node for CMU_FSYS2
> +  - |
> +    #include <dt-bindings/clock/exynosautov9.h>
> +
> +    cmu_fsys2: clock-controller@17c00000 {
> +        compatible = "samsung,exynosautov9-cmu-fsys2";
> +        reg = <0x17c00000 0x8000>;
> +        #clock-cells = <1>;
> +
> +        clocks = <&xtcxo>, <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
> +                 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
> +                 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;

Let's put each item in its own line, so line break after every clock
here and in the clock-names.

Rest looks good.

Best regards,
Krzysztof

Chanho Park May 3, 2022, 10:06 a.m. UTC | #4

> On 02/05/2022 11:02, Chanho Park wrote:
> > Add dt-schema for Exynos Auto v9 SoC clock controller.
> >
> > Signed-off-by: Chanho Park <[e-mail]>
> > ---
> >  .../clock/samsung,exynosautov9-clock.yaml     | 217 ++++++++++++++++++
> >  1 file changed, 217 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yam
> > l
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.y
> > aml
> > b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.y
> > aml
> > new file mode 100644
> > index 000000000000..e2a01f50db6c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clo
> > +++ ck.yaml
> > @@ -0,0 +1,217 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://protect2.fireeye.com/v1/url?k=fb45247c-9a3e8ef5-fb44af33-74fe
> > [phone]ba24b7242494&q=1&e=4fe6f8ce-5796-4b99-a99b-dde22be0ea01&
> > +u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fsamsung%2Cexynosaut
> > +ov9-clock.yaml%23
> > +$schema:
> > +https://protect2.fireeye.com/v1/url?k=5feda469-3e960ee0-5fec2f26-74fe
> > [phone]-d4fa399d62c830d8&q=1&e=4fe6f8ce-5796-4b99-a99b-dde22be0ea01&
> > +u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
> > +
> > +title: Samsung Exynos Auto v9 SoC clock controller
> > +
> > +maintainers:
> > +  - Chanho Park <[e-mail]>
> > +  - Chanwoo Choi <[e-mail]>
> > +  - Krzysztof Kozlowski <[e-mail]>
> > +  - Sylwester Nawrocki <[e-mail]>
> > +  - Tomasz Figa <[e-mail]>
> > +
> > +description: |
> > +  Exynos Auto v9 clock controller is comprised of several CMU units,
> > +generating
> > +  clocks for different domains. Those CMU units are modeled as
> > +separate device
> > +  tree nodes, and might depend on each other. Root clocks in that
> > +clock tree are
> > +  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768
> Hz).
> > +  Those external clocks must be defined as fixed-rate clocks in dts.
> > +
> > +  CMU_TOP is a top-level CMU, where all base clocks are prepared
> > + using PLLs and  dividers; all other clocks of function blocks (other
> > + CMUs) are usually  derived from CMU_TOP.
> > +
> > +  Each clock is assigned an identifier and client nodes can use this
> > + identifier  to specify the clock which they consume. All clocks
> > + available for usage  in clock consumer nodes are defined as
> > + preprocessor macros in  'dt-bindings/clock/exynosautov9.h' header.
> 
> I know this follows Exynos850 pattern, but I would prefer to move towards:
> 1. vendor,device: samsung,exynosautov9.h 2. put here full path, so
> include/dt-bindings ....

Okay. I'll change the file name to "samsung,exynosautov9.h".

<snip>

> > +additionalProperties: false
> > +
> > +examples:
> > +  # Clock controller node for CMU_FSYS2
> > +  - |
> > +    #include <dt-bindings/clock/exynosautov9.h>
> > +
> > +    cmu_fsys2: clock-controller@17c00000 {
> > +        compatible = "samsung,exynosautov9-cmu-fsys2";
> > +        reg = <0x17c00000 0x8000>;
> > +        #clock-cells = <1>;
> > +
> > +        clocks = <&xtcxo>, <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
> > +                 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
> > +                 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
> 
> Let's put each item in its own line, so line break after every clock here
> and in the clock-names.

Make sense. I'll put each item in its own line.

Best Regards,
Chanho Park

Patch

diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
new file mode 100644
index 000000000000..e2a01f50db6c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
@@ -0,0 +1,217 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos Auto v9 SoC clock controller
+
+maintainers:
+  - Chanho Park <[e-mail]>
+  - Chanwoo Choi <[e-mail]>
+  - Krzysztof Kozlowski <[e-mail]>
+  - Sylwester Nawrocki <[e-mail]>
+  - Tomasz Figa <[e-mail]>
+
+description: |
+  Exynos Auto v9 clock controller is comprised of several CMU units, generating
+  clocks for different domains. Those CMU units are modeled as separate device
+  tree nodes, and might depend on each other. Root clocks in that clock tree are
+  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
+  Those external clocks must be defined as fixed-rate clocks in dts.
+
+  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
+  dividers; all other clocks of function blocks (other CMUs) are usually
+  derived from CMU_TOP.
+
+  Each clock is assigned an identifier and client nodes can use this identifier
+  to specify the clock which they consume. All clocks available for usage
+  in clock consumer nodes are defined as preprocessor macros in
+  'dt-bindings/clock/exynosautov9.h' header.
+
+properties:
+  compatible:
+    enum:
+      - samsung,exynosautov9-cmu-top
+      - samsung,exynosautov9-cmu-busmc
+      - samsung,exynosautov9-cmu-core
+      - samsung,exynosautov9-cmu-fsys2
+      - samsung,exynosautov9-cmu-peric0
+      - samsung,exynosautov9-cmu-peric1
+      - samsung,exynosautov9-cmu-peris
+
+  clocks:
+    minItems: 1
+    maxItems: 5
+
+  clock-names:
+    minItems: 1
+    maxItems: 5
+
+  "#clock-cells":
+    const: 1
+
+  reg:
+    maxItems: 1
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-top
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+
+        clock-names:
+          items:
+            - const: oscclk
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-busmc
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_BUSMC bus clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_busmc_bus
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-core
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_CORE bus clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_core_bus
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-fsys2
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_FSYS2 bus clock (from CMU_TOP)
+            - description: UFS clock (from CMU_TOP)
+            - description: Ethernet clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_fsys2_bus
+            - const: dout_fsys2_clkcmu_ufs_embd
+            - const: dout_fsys2_clkcmu_ethernet
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-peric0
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_PERIC0 bus clock (from CMU_TOP)
+            - description: PERIC0 IP clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_peric0_bus
+            - const: dout_clkcmu_peric0_ip
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-peric1
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_PERIC1 bus clock (from CMU_TOP)
+            - description: PERIC1 IP clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_peric1_bus
+            - const: dout_clkcmu_peric1_ip
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov9-cmu-peris
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: CMU_PERIS bus clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_clkcmu_peris_bus
+
+required:
+  - compatible
+  - "#clock-cells"
+  - clocks
+  - clock-names
+  - reg
+
+additionalProperties: false
+
+examples:
+  # Clock controller node for CMU_FSYS2
+  - |
+    #include <dt-bindings/clock/exynosautov9.h>
+
+    cmu_fsys2: clock-controller@17c00000 {
+        compatible = "samsung,exynosautov9-cmu-fsys2";
+        reg = <0x17c00000 0x8000>;
+        #clock-cells = <1>;
+
+        clocks = <&xtcxo>, <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
+                 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
+                 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
+        clock-names = "oscclk", "dout_clkcmu_fsys2_bus",
+                      "dout_fsys2_clkcmu_ufs_embd",
+                      "dout_fsys2_clkcmu_ethernet";
+    };
+
+...