| Message ID | 20220503103334.2046414-3-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [RFC,1/4] target/ppc: Fix eieio memory ordering semantics | expand |
On 5/3/22 03:33, Nicholas Piggin wrote: > lwsync orders more than just LD_LD, importantly it matches x86 and > s390 default memory ordering. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > --- > target/ppc/cpu.h | 2 ++ > tcg/ppc/tcg-target.c.inc | 2 +- > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > index c2b6c987c0..0b0e9761cd 100644 > --- a/target/ppc/cpu.h > +++ b/target/ppc/cpu.h > @@ -28,6 +28,8 @@ > > #define TCG_GUEST_DEFAULT_MO 0 > > +#define PPC_LWSYNC_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) You can't put this here... > + > #define TARGET_PAGE_BITS_64K 16 > #define TARGET_PAGE_BITS_16M 24 > > diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc > index 3ff845d063..b87fc2383e 100644 > --- a/tcg/ppc/tcg-target.c.inc > +++ b/tcg/ppc/tcg-target.c.inc > @@ -1834,7 +1834,7 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) > { > uint32_t insn = HWSYNC; > a0 &= TCG_MO_ALL; > - if (a0 == TCG_MO_LD_LD) { > + if ((a0 & PPC_LWSYNC_MO) == a0) { ... and have it used here. You should have seen compilation failures for the missing symbol. I can only assume you used a restricted --target-list in testing. Anyway, it looks like a simpler test would be insn = (a0 & TCG_MO_ST_LD ? HWSYNC : LWSYNC); r~
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c2b6c987c0..0b0e9761cd 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -28,6 +28,8 @@ #define TCG_GUEST_DEFAULT_MO 0 +#define PPC_LWSYNC_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 3ff845d063..b87fc2383e 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1834,7 +1834,7 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) { uint32_t insn = HWSYNC; a0 &= TCG_MO_ALL; - if (a0 == TCG_MO_LD_LD) { + if ((a0 & PPC_LWSYNC_MO) == a0) { insn = LWSYNC; } tcg_out32(s, insn);
lwsync orders more than just LD_LD, importantly it matches x86 and s390 default memory ordering. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- target/ppc/cpu.h | 2 ++ tcg/ppc/tcg-target.c.inc | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-)