| Message ID | 20220503212531.2657870-1-nfraprado@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: mt8192: Follow binding order for SCP registers | expand |
Il 03/05/22 23:25, Nícolas F. R. A. Prado ha scritto: > The dt-binding for SCP documents the reg-names order as sram, cfg, > l1tcm. Update the SCP node on the mt8192 devicetree to follow that > order, which gets rid of a dtbs_check warning. This doesn't change any > behavior since the SCP driver accesses the memory regions through the > names anyway. > > Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Nic, you need a Fixes: tag on this commit, please add it and send a v2! Cheers!
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 26dbe9ecc528..733aec2e7f77 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -699,9 +699,9 @@ spi7: spi@1101e000 { scp: scp@10500000 { compatible = "mediatek,mt8192-scp"; reg = <0 0x10500000 0 0x100000>, - <0 0x10700000 0 0x8000>, - <0 0x10720000 0 0xe0000>; - reg-names = "sram", "l1tcm", "cfg"; + <0 0x10720000 0 0xe0000>, + <0 0x10700000 0 0x8000>; + reg-names = "sram", "cfg", "l1tcm"; interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&infracfg CLK_INFRA_SCPSYS>; clock-names = "main";
The dt-binding for SCP documents the reg-names order as sram, cfg, l1tcm. Update the SCP node on the mt8192 devicetree to follow that order, which gets rid of a dtbs_check warning. This doesn't change any behavior since the SCP driver accesses the memory regions through the names anyway. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)