| Message ID | 20220503005801.1714345-9-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable designware PCI EP EDMA locally | expand |
On Mon, May 2, 2022 at 7:58 PM Frank Li <Frank.Li@nxp.com> wrote: > > DW_EDMA_CHIP_32BIT_DBI was used by the controller drivers like i.MX8 that > allows only 32bit access to the DBI region. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > Reviewed-by: Serge Semin <fancer.lancer@gmail.com> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Tested-by: Serge Semin <fancer.lancer@gmail.com> I just found a fixed patch already upstreamed. https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git/commit/?h=fixes&id=8fc5133d6d4da65cad6b73152fc714ad3d7f91c1 So this patch can be skipped. This is the last patch about eDMA change. best regards Frank Li > --- > Change from v6 to v10 > - none > Change from v5 to v6 > - use enum instead of define > New patch at v5 > - fix kernel test robot build error > > drivers/dma/dw-edma/dw-edma-v0-core.c | 13 ++++++++----- > include/linux/dma/edma.h | 2 ++ > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c > index 2ab1059a3de1e..2d3f74ccc340a 100644 > --- a/drivers/dma/dw-edma/dw-edma-v0-core.c > +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c > @@ -417,15 +417,18 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > SET_CH_32(dw, chan->dir, chan->id, ch_control1, > (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE)); > /* Linked list */ > - #ifdef CONFIG_64BIT > - SET_CH_64(dw, chan->dir, chan->id, llp.reg, > - chunk->ll_region.paddr); > - #else /* CONFIG_64BIT */ > + if ((chan->dw->chip->flags & DW_EDMA_CHIP_32BIT_DBI) || > + !IS_ENABLED(CONFIG_64BIT)) { > SET_CH_32(dw, chan->dir, chan->id, llp.lsb, > lower_32_bits(chunk->ll_region.paddr)); > SET_CH_32(dw, chan->dir, chan->id, llp.msb, > upper_32_bits(chunk->ll_region.paddr)); > - #endif /* CONFIG_64BIT */ > + } else { > + #ifdef CONFIG_64BIT > + SET_CH_64(dw, chan->dir, chan->id, llp.reg, > + chunk->ll_region.paddr); > + #endif > + } > } > /* Doorbell */ > SET_RW_32(dw, chan->dir, doorbell, > diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h > index 7baf16fd4f233..1664c70a8a0c5 100644 > --- a/include/linux/dma/edma.h > +++ b/include/linux/dma/edma.h > @@ -36,9 +36,11 @@ enum dw_edma_map_format { > /** > * enum dw_edma_chip_flags - Flags specific to an eDMA chip > * @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint > + * @DW_EDMA_CHIP_32BIT_DBI Only support 32bit DBI register access > */ > enum dw_edma_chip_flags { > DW_EDMA_CHIP_LOCAL = BIT(0), > + DW_EDMA_CHIP_32BIT_DBI = BIT(1), > }; > > /** > -- > 2.35.1 >
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c index 2ab1059a3de1e..2d3f74ccc340a 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.c +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c @@ -417,15 +417,18 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) SET_CH_32(dw, chan->dir, chan->id, ch_control1, (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE)); /* Linked list */ - #ifdef CONFIG_64BIT - SET_CH_64(dw, chan->dir, chan->id, llp.reg, - chunk->ll_region.paddr); - #else /* CONFIG_64BIT */ + if ((chan->dw->chip->flags & DW_EDMA_CHIP_32BIT_DBI) || + !IS_ENABLED(CONFIG_64BIT)) { SET_CH_32(dw, chan->dir, chan->id, llp.lsb, lower_32_bits(chunk->ll_region.paddr)); SET_CH_32(dw, chan->dir, chan->id, llp.msb, upper_32_bits(chunk->ll_region.paddr)); - #endif /* CONFIG_64BIT */ + } else { + #ifdef CONFIG_64BIT + SET_CH_64(dw, chan->dir, chan->id, llp.reg, + chunk->ll_region.paddr); + #endif + } } /* Doorbell */ SET_RW_32(dw, chan->dir, doorbell, diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h index 7baf16fd4f233..1664c70a8a0c5 100644 --- a/include/linux/dma/edma.h +++ b/include/linux/dma/edma.h @@ -36,9 +36,11 @@ enum dw_edma_map_format { /** * enum dw_edma_chip_flags - Flags specific to an eDMA chip * @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint + * @DW_EDMA_CHIP_32BIT_DBI Only support 32bit DBI register access */ enum dw_edma_chip_flags { DW_EDMA_CHIP_LOCAL = BIT(0), + DW_EDMA_CHIP_32BIT_DBI = BIT(1), }; /**