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[1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3

Message ID 20220426205144.476234-1-aford173@gmail.com (mailing list archive)
State New, archived
Headers show
Series [1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3 | expand

Commit Message

Adam Ford April 26, 2022, 8:51 p.m. UTC 
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail.  Enable RTS and CTS pin muxing and enable
handshaking in the uart node.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Shawn Guo May 5, 2022, 3:53 a.m. UTC | #1 
On Tue, Apr 26, 2022 at 03:51:43PM -0500, Adam Ford wrote:
> There is a header for a DB9 serial port, but any attempts to use
> hardware handshaking fail.  Enable RTS and CTS pin muxing and enable
> handshaking in the uart node.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied both, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
index ec3f2c177035..f338a886d811 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
@@ -278,6 +278,7 @@  &uart3 {
 	pinctrl-0 = <&pinctrl_uart3>;
 	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
 	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+	uart-has-rtscts;
 	status = "okay";
 };
 
@@ -386,6 +387,8 @@  pinctrl_uart3: uart3grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX	0x40
 			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX	0x40
+			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x40
+			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B	0x40
 		>;
 	};