| Message ID | 20220504145454.71287-5-phil.edworthy@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add Renesas RZ/V2M Ethernet support | expand |
On 5/4/22 5:54 PM, Phil Edworthy wrote: > Currently, when the HW has a single interrupt, the driver uses the > TIC, RIC0 registers to enable and disable RX/TX interrupts. When > the HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0 > registers. > > However, other devices, e.g. RZ/V2M, have multiple irqs and use > the TIC, RIC0 registers. s/use/have only/? > Therefore, split this into a separate feature. > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > drivers/net/ethernet/renesas/ravb.h | 1 + > drivers/net/ethernet/renesas/ravb_main.c | 5 +++-- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h > index 15aa09d93ff0..67a240665cd2 100644 > --- a/drivers/net/ethernet/renesas/ravb.h > +++ b/drivers/net/ethernet/renesas/ravb.h > @@ -1027,6 +1027,7 @@ struct ravb_hw_info { > unsigned tx_counters:1; /* E-MAC has TX counters */ > unsigned carrier_counters:1; /* E-MAC has carrier counters */ > unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */ > + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */ Perhaps just irq_en_dis? > unsigned gptp:1; /* AVB-DMAC has gPTP support */ > unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ > unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ [...] MBR, Sergey
Hi Sergey, On 04 May 2022 20:55 Sergey Shtylyov wrote: > On 5/4/22 5:54 PM, Phil Edworthy wrote: > > > Currently, when the HW has a single interrupt, the driver uses the > > TIC, RIC0 registers to enable and disable RX/TX interrupts. When the > > HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0 > > registers. > > > > However, other devices, e.g. RZ/V2M, have multiple irqs and use the > > TIC, RIC0 registers. > > s/use/have only/? Yes, I'll fix that. > > Therefore, split this into a separate feature. > > > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > drivers/net/ethernet/renesas/ravb.h | 1 + > > drivers/net/ethernet/renesas/ravb_main.c | 5 +++-- > > 2 files changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/net/ethernet/renesas/ravb.h > > b/drivers/net/ethernet/renesas/ravb.h > > index 15aa09d93ff0..67a240665cd2 100644 > > --- a/drivers/net/ethernet/renesas/ravb.h > > +++ b/drivers/net/ethernet/renesas/ravb.h > > @@ -1027,6 +1027,7 @@ struct ravb_hw_info { > > unsigned tx_counters:1; /* E-MAC has TX counters */ > > unsigned carrier_counters:1; /* E-MAC has carrier counters */ > > unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple > irqs */ > > + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable > regs */ > > Perhaps just irq_en_dis? Can do. > > unsigned gptp:1; /* AVB-DMAC has gPTP support */ > > unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in > config mode */ > > unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time > Match irq via GIC */ > [...] Thanks Phil
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 15aa09d93ff0..67a240665cd2 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1027,6 +1027,7 @@ struct ravb_hw_info { unsigned tx_counters:1; /* E-MAC has TX counters */ unsigned carrier_counters:1; /* E-MAC has carrier counters */ unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */ + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */ unsigned gptp:1; /* AVB-DMAC has gPTP support */ unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index de2792c03099..d0b9688074ca 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -1124,7 +1124,7 @@ static bool ravb_queue_interrupt(struct net_device *ndev, int q) if (((ris0 & ric0) & BIT(q)) || ((tis & tic) & BIT(q))) { if (napi_schedule_prep(&priv->napi[q])) { /* Mask RX and TX interrupts */ - if (!info->multi_irqs) { + if (!info->irq_en_dis_regs) { ravb_write(ndev, ric0 & ~BIT(q), RIC0); ravb_write(ndev, tic & ~BIT(q), TIC); } else { @@ -1306,7 +1306,7 @@ static int ravb_poll(struct napi_struct *napi, int budget) /* Re-enable RX/TX interrupts */ spin_lock_irqsave(&priv->lock, flags); - if (!info->multi_irqs) { + if (!info->irq_en_dis_regs) { ravb_modify(ndev, RIC0, mask, mask); ravb_modify(ndev, TIC, mask, mask); } else { @@ -2410,6 +2410,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = { .internal_delay = 1, .tx_counters = 1, .multi_irqs = 1, + .irq_en_dis_regs = 1, .ccc_gac = 1, .nc_queues = 1, .magic_pkt = 1,