Message ID | 20220512144557.18025-2-yf.wang@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | MediaTek TTBR up to 35bit support | expand |
Hi, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on arm-perf/for-next/perf] [also build test WARNING on linus/master v5.18-rc6 next-20220512] [cannot apply to joro-iommu/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/yf-wang-mediatek-com/iommu-io-pgtable-arm-v7s-Add-a-quirk-to-allow-pgtable-PA-up-to-35bit/20220512-234603 base: https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-next/perf config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20220513/202205131016.Ati0kpNR-lkp@intel.com/config) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 9519dacab7b8afd537811fc2abaceb4d14f4e16a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/916a5fc41cbb8ddfe343193598f250d06b09e3fa git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review yf-wang-mediatek-com/iommu-io-pgtable-arm-v7s-Add-a-quirk-to-allow-pgtable-PA-up-to-35bit/20220512-234603 git checkout 916a5fc41cbb8ddfe343193598f250d06b09e3fa # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/iommu/ drivers/rtc/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): >> drivers/iommu/io-pgtable-arm-v7s.c:886:4: warning: shift count >= width of type [-Wshift-count-overflow] ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:154:39: note: expanded from macro 'ARM_V7S_TTBR_35BIT_PA' ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) ^~~~~~~~~~~~~~~ include/linux/bits.h:38:31: note: expanded from macro 'GENMASK' (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) ^~~~~~~~~~~~~~~ include/linux/bits.h:35:22: note: expanded from macro '__GENMASK' (((~UL(0)) - (UL(1) << (l)) + 1) & \ ^ ~~~ >> drivers/iommu/io-pgtable-arm-v7s.c:886:4: warning: shift count is negative [-Wshift-count-negative] ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:154:39: note: expanded from macro 'ARM_V7S_TTBR_35BIT_PA' ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) ^~~~~~~~~~~~~~~ include/linux/bits.h:38:31: note: expanded from macro 'GENMASK' (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) ^~~~~~~~~~~~~~~ include/linux/bits.h:36:11: note: expanded from macro '__GENMASK' (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) ^ ~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/iommu/io-pgtable-arm-v7s.c:886:4: warning: shift count >= width of type [-Wshift-count-overflow] ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:154:56: note: expanded from macro 'ARM_V7S_TTBR_35BIT_PA' ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) ^ ~~ 3 warnings generated. vim +886 drivers/iommu/io-pgtable-arm-v7s.c 795 796 static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, 797 void *cookie) 798 { 799 slab_flags_t slab_flag = ARM_V7S_TABLE_SLAB_FLAGS; 800 struct arm_v7s_io_pgtable *data; 801 phys_addr_t paddr; 802 803 if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS)) 804 return NULL; 805 806 if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS)) 807 return NULL; 808 809 if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | 810 IO_PGTABLE_QUIRK_NO_PERMS | 811 IO_PGTABLE_QUIRK_ARM_MTK_EXT | 812 IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT)) 813 return NULL; 814 815 /* If ARM_MTK_4GB is enabled, the NO_PERMS is also expected. */ 816 if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_EXT && 817 !(cfg->quirks & IO_PGTABLE_QUIRK_NO_PERMS)) 818 return NULL; 819 820 data = kmalloc(sizeof(*data), GFP_KERNEL); 821 if (!data) 822 return NULL; 823 824 spin_lock_init(&data->split_lock); 825 if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) 826 slab_flag = 0; 827 data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", 828 ARM_V7S_TABLE_SIZE(2, cfg), 829 ARM_V7S_TABLE_SIZE(2, cfg), 830 slab_flag, NULL); 831 if (!data->l2_tables) 832 goto out_free_data; 833 834 data->iop.ops = (struct io_pgtable_ops) { 835 .map = arm_v7s_map, 836 .map_pages = arm_v7s_map_pages, 837 .unmap = arm_v7s_unmap, 838 .unmap_pages = arm_v7s_unmap_pages, 839 .iova_to_phys = arm_v7s_iova_to_phys, 840 }; 841 842 /* We have to do this early for __arm_v7s_alloc_table to work... */ 843 data->iop.cfg = *cfg; 844 845 /* 846 * Unless the IOMMU driver indicates supersection support by 847 * having SZ_16M set in the initial bitmap, they won't be used. 848 */ 849 cfg->pgsize_bitmap &= SZ_4K | SZ_64K | SZ_1M | SZ_16M; 850 851 /* TCR: T0SZ=0, EAE=0 (if applicable) */ 852 cfg->arm_v7s_cfg.tcr = 0; 853 854 /* 855 * TEX remap: the indices used map to the closest equivalent types 856 * under the non-TEX-remap interpretation of those attribute bits, 857 * excepting various implementation-defined aspects of shareability. 858 */ 859 cfg->arm_v7s_cfg.prrr = ARM_V7S_PRRR_TR(1, ARM_V7S_PRRR_TYPE_DEVICE) | 860 ARM_V7S_PRRR_TR(4, ARM_V7S_PRRR_TYPE_NORMAL) | 861 ARM_V7S_PRRR_TR(7, ARM_V7S_PRRR_TYPE_NORMAL) | 862 ARM_V7S_PRRR_DS0 | ARM_V7S_PRRR_DS1 | 863 ARM_V7S_PRRR_NS1 | ARM_V7S_PRRR_NOS(7); 864 cfg->arm_v7s_cfg.nmrr = ARM_V7S_NMRR_IR(7, ARM_V7S_RGN_WBWA) | 865 ARM_V7S_NMRR_OR(7, ARM_V7S_RGN_WBWA); 866 867 /* Looking good; allocate a pgd */ 868 data->pgd = __arm_v7s_alloc_table(1, GFP_KERNEL, data); 869 if (!data->pgd) 870 goto out_free_data; 871 872 /* Ensure the empty pgd is visible before any actual TTBR write */ 873 wmb(); 874 875 /* TTBR */ 876 paddr = virt_to_phys(data->pgd); 877 cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S | 878 (cfg->coherent_walk ? (ARM_V7S_TTBR_NOS | 879 ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) | 880 ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA)) : 881 (ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) | 882 ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC))); 883 884 if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) 885 cfg->arm_v7s_cfg.ttbr = > 886 ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); 887 return &data->iop; 888 889 out_free_data: 890 kmem_cache_destroy(data->l2_tables); 891 kfree(data); 892 return NULL; 893 } 894
Hi, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on arm-perf/for-next/perf] [also build test WARNING on linus/master v5.18-rc6] [cannot apply to joro-iommu/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/yf-wang-mediatek-com/iommu-io-pgtable-arm-v7s-Add-a-quirk-to-allow-pgtable-PA-up-to-35bit/20220512-234603 base: https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-next/perf config: arm-qcom_defconfig (https://download.01.org/0day-ci/archive/20220513/202205131021.3GskEbg2-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/916a5fc41cbb8ddfe343193598f250d06b09e3fa git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review yf-wang-mediatek-com/iommu-io-pgtable-arm-v7s-Add-a-quirk-to-allow-pgtable-PA-up-to-35bit/20220512-234603 git checkout 916a5fc41cbb8ddfe343193598f250d06b09e3fa # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/iommu/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): In file included from include/linux/ratelimit_types.h:5, from include/linux/ratelimit.h:5, from include/linux/dev_printk.h:16, from include/linux/device.h:15, from include/linux/dma-mapping.h:7, from drivers/iommu/io-pgtable-arm-v7s.c:25: drivers/iommu/io-pgtable-arm-v7s.c: In function 'arm_v7s_alloc_pgtable': include/linux/bits.h:35:29: warning: left shift count >= width of type [-Wshift-count-overflow] 35 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | ^~ include/linux/bits.h:38:38: note: in expansion of macro '__GENMASK' 38 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:154:46: note: in expansion of macro 'GENMASK' 154 | ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) | ^~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:886:25: note: in expansion of macro 'ARM_V7S_TTBR_35BIT_PA' 886 | ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); | ^~~~~~~~~~~~~~~~~~~~~ include/linux/bits.h:36:18: warning: right shift count is negative [-Wshift-count-negative] 36 | (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) | ^~ include/linux/bits.h:38:38: note: in expansion of macro '__GENMASK' 38 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:154:46: note: in expansion of macro 'GENMASK' 154 | ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) | ^~~~~~~ drivers/iommu/io-pgtable-arm-v7s.c:886:25: note: in expansion of macro 'ARM_V7S_TTBR_35BIT_PA' 886 | ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); | ^~~~~~~~~~~~~~~~~~~~~ >> drivers/iommu/io-pgtable-arm-v7s.c:154:63: warning: right shift count >= width of type [-Wshift-count-overflow] 154 | ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) | ^~ drivers/iommu/io-pgtable-arm-v7s.c:886:25: note: in expansion of macro 'ARM_V7S_TTBR_35BIT_PA' 886 | ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); | ^~~~~~~~~~~~~~~~~~~~~ vim +154 drivers/iommu/io-pgtable-arm-v7s.c 145 146 #define ARM_V7S_TTBR_S BIT(1) 147 #define ARM_V7S_TTBR_NOS BIT(5) 148 #define ARM_V7S_TTBR_ORGN_ATTR(attr) (((attr) & 0x3) << 3) 149 #define ARM_V7S_TTBR_IRGN_ATTR(attr) \ 150 ((((attr) & 0x1) << 6) | (((attr) & 0x2) >> 1)) 151 152 /* Mediatek extend ttbr bits[2:0] for PA bits[34:32] */ 153 #define ARM_V7S_TTBR_35BIT_PA(ttbr, pa) \ > 154 ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) 155
diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index be066c1503d3..57455ae052ac 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c @@ -149,6 +149,10 @@ #define ARM_V7S_TTBR_IRGN_ATTR(attr) \ ((((attr) & 0x1) << 6) | (((attr) & 0x2) >> 1)) +/* Mediatek extend ttbr bits[2:0] for PA bits[34:32] */ +#define ARM_V7S_TTBR_35BIT_PA(ttbr, pa) \ + ((ttbr & ((u32)(~0U << 3))) | ((pa & GENMASK(34, 32)) >> 32)) + #ifdef CONFIG_ZONE_DMA32 #define ARM_V7S_TABLE_GFP_DMA GFP_DMA32 #define ARM_V7S_TABLE_SLAB_FLAGS SLAB_CACHE_DMA32 @@ -182,14 +186,8 @@ static bool arm_v7s_is_mtk_enabled(struct io_pgtable_cfg *cfg) (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_EXT); } -static arm_v7s_iopte paddr_to_iopte(phys_addr_t paddr, int lvl, - struct io_pgtable_cfg *cfg) +static arm_v7s_iopte to_iopte_mtk(phys_addr_t paddr, arm_v7s_iopte pte) { - arm_v7s_iopte pte = paddr & ARM_V7S_LVL_MASK(lvl); - - if (!arm_v7s_is_mtk_enabled(cfg)) - return pte; - if (paddr & BIT_ULL(32)) pte |= ARM_V7S_ATTR_MTK_PA_BIT32; if (paddr & BIT_ULL(33)) @@ -199,6 +197,17 @@ static arm_v7s_iopte paddr_to_iopte(phys_addr_t paddr, int lvl, return pte; } +static arm_v7s_iopte paddr_to_iopte(phys_addr_t paddr, int lvl, + struct io_pgtable_cfg *cfg) +{ + arm_v7s_iopte pte = paddr & ARM_V7S_LVL_MASK(lvl); + + if (!arm_v7s_is_mtk_enabled(cfg)) + return pte; + + return to_iopte_mtk(paddr, pte); +} + static phys_addr_t iopte_to_paddr(arm_v7s_iopte pte, int lvl, struct io_pgtable_cfg *cfg) { @@ -234,6 +243,7 @@ static arm_v7s_iopte *iopte_deref(arm_v7s_iopte pte, int lvl, static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, struct arm_v7s_io_pgtable *data) { + gfp_t gfp_l1 = __GFP_ZERO | ARM_V7S_TABLE_GFP_DMA; struct io_pgtable_cfg *cfg = &data->iop.cfg; struct device *dev = cfg->iommu_dev; phys_addr_t phys; @@ -241,9 +251,11 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); void *table = NULL; + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) + gfp_l1 = __GFP_ZERO; + if (lvl == 1) - table = (void *)__get_free_pages( - __GFP_ZERO | ARM_V7S_TABLE_GFP_DMA, get_order(size)); + table = (void *)__get_free_pages(gfp_l1, get_order(size)); else if (lvl == 2) table = kmem_cache_zalloc(data->l2_tables, gfp); @@ -251,7 +263,8 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, return NULL; phys = virt_to_phys(table); - if (phys != (arm_v7s_iopte)phys) { + if (phys != (arm_v7s_iopte)phys && + !(cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT)) { /* Doesn't fit in PTE */ dev_err(dev, "Page table does not fit in PTE: %pa", &phys); goto out_free; @@ -457,9 +470,14 @@ static arm_v7s_iopte arm_v7s_install_table(arm_v7s_iopte *table, arm_v7s_iopte curr, struct io_pgtable_cfg *cfg) { + phys_addr_t phys = virt_to_phys(table); arm_v7s_iopte old, new; - new = virt_to_phys(table) | ARM_V7S_PTE_TYPE_TABLE; + new = phys | ARM_V7S_PTE_TYPE_TABLE; + + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) + new = to_iopte_mtk(phys, new); + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_NS) new |= ARM_V7S_ATTR_NS_TABLE; @@ -778,7 +796,9 @@ static phys_addr_t arm_v7s_iova_to_phys(struct io_pgtable_ops *ops, static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) { + slab_flags_t slab_flag = ARM_V7S_TABLE_SLAB_FLAGS; struct arm_v7s_io_pgtable *data; + phys_addr_t paddr; if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS)) return NULL; @@ -788,7 +808,8 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_NO_PERMS | - IO_PGTABLE_QUIRK_ARM_MTK_EXT)) + IO_PGTABLE_QUIRK_ARM_MTK_EXT | + IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT)) return NULL; /* If ARM_MTK_4GB is enabled, the NO_PERMS is also expected. */ @@ -801,10 +822,12 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, return NULL; spin_lock_init(&data->split_lock); + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) + slab_flag = 0; data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", ARM_V7S_TABLE_SIZE(2, cfg), ARM_V7S_TABLE_SIZE(2, cfg), - ARM_V7S_TABLE_SLAB_FLAGS, NULL); + slab_flag, NULL); if (!data->l2_tables) goto out_free_data; @@ -850,12 +873,17 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, wmb(); /* TTBR */ - cfg->arm_v7s_cfg.ttbr = virt_to_phys(data->pgd) | ARM_V7S_TTBR_S | + paddr = virt_to_phys(data->pgd); + cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S | (cfg->coherent_walk ? (ARM_V7S_TTBR_NOS | ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) | ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA)) : (ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) | ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC))); + + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) + cfg->arm_v7s_cfg.ttbr = + ARM_V7S_TTBR_35BIT_PA(cfg->arm_v7s_cfg.ttbr, paddr); return &data->iop; out_free_data: diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 86af6f0a00a2..7ed15ad4710c 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -74,17 +74,22 @@ struct io_pgtable_cfg { * to support up to 35 bits PA where the bit32, bit33 and bit34 are * encoded in the bit9, bit4 and bit5 of the PTE respectively. * + * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs + * extend the translation table support up to 35 bits PA, the + * encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT. + * * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table * for use in the upper half of a split address space. * * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability * attributes set in the TCR for a non-coherent page-table walker. */ - #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) - #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) - #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) - #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) - #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) + #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) + #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) + #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) + #define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT BIT(4) + #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) + #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) unsigned long quirks; unsigned long pgsize_bitmap; unsigned int ias;