Message ID | 20220517182219.2171814-6-broonie@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64/sysreg: More system register generation | expand |
On Tue, May 17, 2022 at 07:22:15PM +0100, Mark Brown wrote: > Convert CSSELR_EL1 to automatic generation as per DDI0487H.a, no functional > change. > > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > arch/arm64/include/asm/sysreg.h | 2 -- > arch/arm64/tools/sysreg | 7 +++++++ > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index c30f5aafde34..6240149f9818 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -461,8 +461,6 @@ > #define SMIDR_EL1_SMPS_SHIFT 15 > #define SMIDR_EL1_AFFINITY_SHIFT 0 > > -#define SYS_CSSELR_EL1 sys_reg(3, 2, 0, 0, 0) > - > #define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1) > #define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7) > > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index 21d5c140fde3..47c4c45d5dc3 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -270,6 +270,13 @@ Res0 14:12 > Field 11:0 AFFINITY > EndSysreg > > +Sysreg CSSELR_EL1 3 2 0 0 0 > +Res0 63:5 > +Field 4 TnD > +Field 3:1 Level > +Field 0 InD > +EndSysreg These all look right to me per ARM DDI 0487H.a pages D13-5332 to D13-5334: Reviewed-by: Mark Rutland <mark.rutland@arm.com> Mark. > + > Sysreg SVCR 3 3 4 2 2 > Res0 63:2 > Field 1 ZA > -- > 2.30.2 >
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index c30f5aafde34..6240149f9818 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -461,8 +461,6 @@ #define SMIDR_EL1_SMPS_SHIFT 15 #define SMIDR_EL1_AFFINITY_SHIFT 0 -#define SYS_CSSELR_EL1 sys_reg(3, 2, 0, 0, 0) - #define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1) #define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 21d5c140fde3..47c4c45d5dc3 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -270,6 +270,13 @@ Res0 14:12 Field 11:0 AFFINITY EndSysreg +Sysreg CSSELR_EL1 3 2 0 0 0 +Res0 63:5 +Field 4 TnD +Field 3:1 Level +Field 0 InD +EndSysreg + Sysreg SVCR 3 3 4 2 2 Res0 63:2 Field 1 ZA
Convert CSSELR_EL1 to automatic generation as per DDI0487H.a, no functional change. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/include/asm/sysreg.h | 2 -- arch/arm64/tools/sysreg | 7 +++++++ 2 files changed, 7 insertions(+), 2 deletions(-)