| Message ID | 20220523100058.26241-1-quic_tdas@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v5] arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers | expand |
Hi Taniya,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v5.18]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Taniya-Das/arm64-dts-qcom-sc7280-Add-lpasscore-lpassaudio-clock-controllers/20220523-180437
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-r026-20220522 (https://download.01.org/0day-ci/archive/20220524/202205240130.JscI0RkD-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/6a56b4899f4e80f53613ce8e9569e2d1ca46f46a
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Taniya-Das/arm64-dts-qcom-sc7280-Add-lpasscore-lpassaudio-clock-controllers/20220523-180437
git checkout 6a56b4899f4e80f53613ce8e9569e2d1ca46f46a
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts:17:
>> arch/arm64/boot/dts/qcom/sc7280.dtsi:11:10: fatal error: dt-bindings/clock/qcom,lpassaudiocc-sc7280.h: No such file or directory
11 | #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
vim +11 arch/arm64/boot/dts/qcom/sc7280.dtsi
> 11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/interconnect/qcom,osm-l3.h>
17 #include <dt-bindings/interconnect/qcom,sc7280.h>
18 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 #include <dt-bindings/mailbox/qcom-ipcc.h>
20 #include <dt-bindings/power/qcom-rpmpd.h>
21 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
22 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
23 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
24 #include <dt-bindings/thermal/thermal.h>
25
On Mon, May 23, 2022 at 03:30:58PM +0530, Taniya Das wrote: > Add the low pass audio clock controller device nodes. Keep the lpasscc > clock node disabled and enabled for lpass pil based devices. > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Why is this series still evolving? v3 landed in Bjorn's tree some time ago: 9499240d15f2 arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers If what landed is not correct or needs to be adapted you should send a patch that is based on the current QCOM tree and makes the necessary changes. The versioning of that patch should start with v1.
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index f0b64be63c21..2c5be0266d38 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -8,6 +8,8 @@ #include <dt-bindings/clock/qcom,dispcc-sc7280.h> #include <dt-bindings/clock/qcom,gcc-sc7280.h> #include <dt-bindings/clock/qcom,gpucc-sc7280.h> +#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> +#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,videocc-sc7280.h> #include <dt-bindings/gpio/gpio.h> @@ -1978,6 +1980,48 @@ clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; + status = "disabled"; + }; + + lpass_audiocc: clock-controller@3300000 { + compatible = "qcom,sc7280-lpassaudiocc"; + reg = <0 0x03300000 0 0x30000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; + clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; + power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + lpass_aon: clock-controller@3380000 { + compatible = "qcom,sc7280-lpassaoncc"; + reg = <0 0x03380000 0 0x30000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&lpass_core LPASS_CORE_CC_CORE_CLK>; + clock-names = "bi_tcxo", "bi_tcxo_ao", "iface"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + lpass_core: clock-controller@3900000 { + compatible = "qcom,sc7280-lpasscorecc"; + reg = <0 0x03900000 0 0x50000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + lpass_hm: clock-controller@3c00000 { + compatible = "qcom,sc7280-lpasshm"; + reg = <0 0x3c00000 0 0x28>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #power-domain-cells = <1>; }; lpass_ag_noc: interconnect@3c40000 {
Add the low pass audio clock controller device nodes. Keep the lpasscc clock node disabled and enabled for lpass pil based devices. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- [v5] * Update the lpasscore phandle as 'lpass_core' for consistency. [v4] * Mark lpasscc[lpasscc@3000000] device node as "disabled". [v3] * Fix unwanted extra spaces in reg property. * Fix lpass_aon node clock phandle <&lpasscc> to <&lpasscore> arch/arm64/boot/dts/qcom/sc7280.dtsi | 44 ++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) -- 2.17.1