| Message ID | 1652978825-5304-2-git-send-email-quic_sibis@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for proxy interconnect bandwidth votes | expand |
On Thu 19 May 09:47 PDT 2022, Sibi Sankar wrote: > Add interconnects that are required to be proxy voted upon during modem > bootup on SC7280 SoCs. This looks reasonable, but how come the vote is only for DDR frequency? What about the buses between modem and ddr? Regards, Bjorn > > Reviewed-by: Matthias Kaehlcke <mka@chromium.org> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi > index 9f4a9c263c35..91aad86cc708 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi > @@ -88,6 +88,7 @@ > status = "okay"; > compatible = "qcom,sc7280-mss-pil"; > iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; > + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; > memory-region = <&mba_mem>, <&mpss_mem>; > }; > > -- > 2.7.4 >
Hey Bjorn, Thanks for taking time to review the series. On 5/20/22 2:05 AM, Bjorn Andersson wrote: > On Thu 19 May 09:47 PDT 2022, Sibi Sankar wrote: > >> Add interconnects that are required to be proxy voted upon during modem >> bootup on SC7280 SoCs. > > This looks reasonable, but how come the vote is only for DDR frequency? > What about the buses between modem and ddr? The proxy votes that are put in aren't for perf related reasons, the modem was getting llcc timeouts while trying to read contents from memory. The hw team recommended the proxy votes as the fix. -Sibi > > Regards, > Bjorn > >> >> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> >> Reviewed-by: Stephen Boyd <swboyd@chromium.org> >> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi >> index 9f4a9c263c35..91aad86cc708 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi >> @@ -88,6 +88,7 @@ >> status = "okay"; >> compatible = "qcom,sc7280-mss-pil"; >> iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; >> + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; >> memory-region = <&mba_mem>, <&mpss_mem>; >> }; >> >> -- >> 2.7.4 >>
Quoting Sibi Sankar (2022-05-20 11:08:52) > Hey Bjorn, > Thanks for taking time to review the series. > > On 5/20/22 2:05 AM, Bjorn Andersson wrote: > > On Thu 19 May 09:47 PDT 2022, Sibi Sankar wrote: > > > >> Add interconnects that are required to be proxy voted upon during modem > >> bootup on SC7280 SoCs. > > > > This looks reasonable, but how come the vote is only for DDR frequency? > > What about the buses between modem and ddr? > > The proxy votes that are put in aren't for perf related reasons, the > modem was getting llcc timeouts while trying to read contents from > memory. The hw team recommended the proxy votes as the fix. Presumably the bootloader sets up some initial modem and ddr bus bandwidth requests? Or the modem bootloader stage (MSA?) handles that part?
On 5/21/22 12:37 AM, Stephen Boyd wrote: > Quoting Sibi Sankar (2022-05-20 11:08:52) >> Hey Bjorn, >> Thanks for taking time to review the series. >> >> On 5/20/22 2:05 AM, Bjorn Andersson wrote: >>> On Thu 19 May 09:47 PDT 2022, Sibi Sankar wrote: >>> >>>> Add interconnects that are required to be proxy voted upon during modem >>>> bootup on SC7280 SoCs. >>> >>> This looks reasonable, but how come the vote is only for DDR frequency? >>> What about the buses between modem and ddr? >> >> The proxy votes that are put in aren't for perf related reasons, the >> modem was getting llcc timeouts while trying to read contents from >> memory. The hw team recommended the proxy votes as the fix. > > Presumably the bootloader sets up some initial modem and ddr bus > bandwidth requests? Or the modem bootloader stage (MSA?) handles that > part? Stephen/Bjorn, Sorry for the delay, took a while to dig this up. The modem interconnect is connected directly to gemnoc ddr. The path info from modem --> ddr is split up into modem --> llcc and llcc --> ddr (Similar to CPUs) i.e. in the end scaling of the path involves scaling of the two clocks, gemnoc and ddr. There isn't any default vote for modem --> llcc as such but it gets implicitly scaled when we vote max for llcc --> ddr path due to dependency maintained between the two clocks by rpmh. -Sibi >
On Thu, 19 May 2022 22:17:03 +0530, Sibi Sankar wrote: > Add interconnects that are required to be proxy voted upon during modem > bootup on SC7280 SoCs. > > Applied, thanks! [1/3] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem commit: a0cdc83fa89b3a53cf03ecd338832392be0dd4b3 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index 9f4a9c263c35..91aad86cc708 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -88,6 +88,7 @@ status = "okay"; compatible = "qcom,sc7280-mss-pil"; iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; memory-region = <&mba_mem>, <&mpss_mem>; };