| Message ID | 20220531012220.80563-7-alim.akhtar@samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] dt-bindings: phy: Add FSD UFS PHY bindings | expand |
On 31/05/2022 03:22, Alim Akhtar wrote: > Adds FSD ufs device node and enable the same > for fsd board. This also adds the required > pin configuration for the same. > > Cc: linux-fsd@tesla.com > Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com> > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> > --- > arch/arm64/boot/dts/tesla/fsd-evb.dts | 4 +++ > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 14 +++++++++++ > arch/arm64/boot/dts/tesla/fsd.dtsi | 29 ++++++++++++++++++++++ > 3 files changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts > index 5af560c1b5e6..1db6ddf03f01 100644 > --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts > +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts > @@ -37,3 +37,7 @@ &fin_pll { > &serial_0 { > status = "okay"; > }; > + > +&ufs { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > index d4d0cb005712..387a41e251d5 100644 > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > @@ -50,6 +50,20 @@ gpf5: gpf5-gpio-bank { > interrupt-controller; > #interrupt-cells = <2>; > }; > + > + ufs_rst_n: ufs-rst-n-pins { > + samsung,pins = "gpf5-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; > + }; > + > + ufs_refclk_out: ufs-refclk-out-pins { > + samsung,pins = "gpf5-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; > + }; > }; > > &pinctrl_peric { > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi > index af39655331de..a5972e9a2585 100644 > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi > @@ -740,6 +740,35 @@ timer@10040000 { > clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>; > clock-names = "fin_pll", "mct"; > }; > + > + ufs: ufs@15120000 { > + compatible = "tesla,fsd-ufs"; > + reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */ Double space after 0x0 > + <0x0 0x15121100 0x0 0x200>, /* 1: Vendor specified */ Please align with opening < in line before. > + <0x0 0x15110000 0x0 0x8000>, /* 2: UNIPRO */ > + <0x0 0x15130000 0x0 0x100>; /* 3: UFS protector */ > + reg-names = "hci", "vs_hci", "unipro", "ufsp"; > + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clock_fsys0 UFS0_TOP0_HCLK_BUS>, > + <&clock_fsys0 UFS0_TOP0_CLK_UNIPRO>; Also align. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 5af560c1b5e6..1db6ddf03f01 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -37,3 +37,7 @@ &fin_pll { &serial_0 { status = "okay"; }; + +&ufs { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index d4d0cb005712..387a41e251d5 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -50,6 +50,20 @@ gpf5: gpf5-gpio-bank { interrupt-controller; #interrupt-cells = <2>; }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpf5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpf5-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + }; }; &pinctrl_peric { diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index af39655331de..a5972e9a2585 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -740,6 +740,35 @@ timer@10040000 { clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>; clock-names = "fin_pll", "mct"; }; + + ufs: ufs@15120000 { + compatible = "tesla,fsd-ufs"; + reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */ + <0x0 0x15121100 0x0 0x200>, /* 1: Vendor specified */ + <0x0 0x15110000 0x0 0x8000>, /* 2: UNIPRO */ + <0x0 0x15130000 0x0 0x100>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock_fsys0 UFS0_TOP0_HCLK_BUS>, + <&clock_fsys0 UFS0_TOP0_CLK_UNIPRO>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + phys = <&ufs_phy>; + phy-names = "ufs-phy"; + status = "disabled"; + }; + + ufs_phy: ufs-phy@15124000 { + compatible = "tesla,fsd-ufs-phy"; + reg = <0x0 0x15124000 0x0 0x800>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>; + clock-names = "ref_clk"; + }; }; };