| Message ID | 20220530125421.885236-1-brent.lu@intel.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ASoC: Intel: cirrus-common: fix incorrect channel mapping | expand |
On 5/30/22 07:54, Brent Lu wrote: > From: xliu <xiang.liu@cirrus.com> > > The default mapping of ASPRX1 Slot is left channel. Map the slots of > right amplifiers (WR and TR) to right channel. > > Signed-off-by: xliu <xiang.liu@cirrus.com> > Signed-off-by: Brent Lu <brent.lu@intel.com> > --- > sound/soc/intel/boards/sof_cirrus_common.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/sound/soc/intel/boards/sof_cirrus_common.c b/sound/soc/intel/boards/sof_cirrus_common.c > index e71d74ec1b0b..64ca0e3991dc 100644 > --- a/sound/soc/intel/boards/sof_cirrus_common.c > +++ b/sound/soc/intel/boards/sof_cirrus_common.c > @@ -107,6 +107,7 @@ static int cs35l41_hw_params(struct snd_pcm_substream *substream, > struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); > struct snd_soc_dai *codec_dai; > int clk_freq, i, ret; > + int rx_ch[2] = {1, 0}; Should this be 'const'? I am also not clear on the mapping, how does this select the right channel? This selects slot0 and the left channel, what am I missing? > > clk_freq = sof_dai_get_bclk(rtd); /* BCLK freq */ > > @@ -134,6 +135,17 @@ static int cs35l41_hw_params(struct snd_pcm_substream *substream, > ret); > return ret; > } > + > + /* Setup for R channel Slot: WR and TR */ > + if (i % 2) { > + ret = snd_soc_dai_set_channel_map(codec_dai, 0, NULL, > + ARRAY_SIZE(rx_ch), rx_ch); > + if (ret < 0) { > + dev_err(codec_dai->dev, "fail to set channel map, ret %d\n", > + ret); > + return ret; > + } > + } Should we do this loop for the left channels as well to have an explicit setting? > } > > return 0;
> > + int rx_ch[2] = {1, 0}; > > Should this be 'const'? Will fix it. > > I am also not clear on the mapping, how does this select the right channel? > This selects slot0 and the left channel, what am I missing? There are two DAC sources ASPRX1 and ASPRX2 which is on slot 0 and slot 1 by default. And the DAC is using ASPRX1 as source. The {1, 0} will setup ASPRX1 to be on slot 1 and ASPRX2 on slot 0 so the amps will be using slot 1 as DAC source. > > @@ -134,6 +135,17 @@ static int cs35l41_hw_params(struct > snd_pcm_substream *substream, > > ret); > > return ret; > > } > > + > > + /* Setup for R channel Slot: WR and TR */ > > + if (i % 2) { > > + ret = snd_soc_dai_set_channel_map(codec_dai, 0, > NULL, > > + ARRAY_SIZE(rx_ch), > rx_ch); > > + if (ret < 0) { > > + dev_err(codec_dai->dev, "fail to set channel > map, ret %d\n", > > + ret); > > + return ret; > > + } > > + } > > Should we do this loop for the left channels as well to have an explicit setting? Will do it in V2 patch. > > > } > > > > return 0;
diff --git a/sound/soc/intel/boards/sof_cirrus_common.c b/sound/soc/intel/boards/sof_cirrus_common.c index e71d74ec1b0b..64ca0e3991dc 100644 --- a/sound/soc/intel/boards/sof_cirrus_common.c +++ b/sound/soc/intel/boards/sof_cirrus_common.c @@ -107,6 +107,7 @@ static int cs35l41_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); struct snd_soc_dai *codec_dai; int clk_freq, i, ret; + int rx_ch[2] = {1, 0}; clk_freq = sof_dai_get_bclk(rtd); /* BCLK freq */ @@ -134,6 +135,17 @@ static int cs35l41_hw_params(struct snd_pcm_substream *substream, ret); return ret; } + + /* Setup for R channel Slot: WR and TR */ + if (i % 2) { + ret = snd_soc_dai_set_channel_map(codec_dai, 0, NULL, + ARRAY_SIZE(rx_ch), rx_ch); + if (ret < 0) { + dev_err(codec_dai->dev, "fail to set channel map, ret %d\n", + ret); + return ret; + } + } } return 0;