| Message ID | 20220522162802.208275-2-luca@z3ntu.xyz (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | CAMSS support for MSM8974 | expand |
On 22/05/2022 18:27, Luca Weiss wrote: > From: Matti Lehtimäki <matti.lehtimaki@gmail.com> Thank you for your patch. There is something to discuss/improve. > > Add bindings for qcom,msm8974-camss in order to support the camera > subsystem on MSM8974. > > Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > --- > .../bindings/media/qcom,msm8974-camss.yaml | 321 ++++++++++++++++++ > 1 file changed, 321 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > new file mode 100644 > index 000000000000..f8f71e477535 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > @@ -0,0 +1,321 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/media/qcom,msm8974-camss.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Qualcomm CAMSS ISP > + > +maintainers: > + - Robert Foss <robert.foss@linaro.org> > + > +description: | > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms > + > +properties: > + compatible: > + const: qcom,msm8974-camss > + > + clocks: > + minItems: 31 No need for minItems, they are equal to max by default. > + maxItems: 31 > + > + clock-names: > + items: > + - const: top_ahb > + - const: ispif_ahb > + - const: csiphy0_timer > + - const: csiphy1_timer > + - const: csiphy2_timer > + - const: csi0_ahb > + - const: csi0 > + - const: csi0_phy > + - const: csi0_pix > + - const: csi0_rdi > + - const: csi1_ahb > + - const: csi1 > + - const: csi1_phy > + - const: csi1_pix > + - const: csi1_rdi > + - const: csi2_ahb > + - const: csi2 > + - const: csi2_phy > + - const: csi2_pix > + - const: csi2_rdi > + - const: csi3_ahb > + - const: csi3 > + - const: csi3_phy > + - const: csi3_pix > + - const: csi3_rdi > + - const: vfe0 > + - const: vfe1 > + - const: csi_vfe0 > + - const: csi_vfe1 > + - const: iface > + - const: bus > + > + interrupts: > + minItems: 10 Same. > + maxItems: 10 > + > + interrupt-names: > + items: > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid3 > + - const: ispif > + - const: vfe0 > + - const: vfe1 > + > + power-domains: > + items: > + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + items: > + - const: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + port@1: These look all the same, so just use patternPropreties (in "ports") with proper pattern. > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + items: > + - const: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + port@2: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + items: > + - const: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - clock-lanes > + - data-lanes > + > + reg: > + minItems: 14 > + maxItems: 14 > + > + reg-names: > + items: > + - const: csiphy0 > + - const: csiphy0_clk_mux > + - const: csiphy1 > + - const: csiphy1_clk_mux > + - const: csiphy2 > + - const: csiphy2_clk_mux > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid3 > + - const: ispif > + - const: csi_clk_mux > + - const: vfe0 > + - const: vfe1 > + > + vdda-supply: > + description: > + Definition of the regulator used as analog power supply. > + > +required: > + - clock-names > + - clocks > + - compatible > + - interrupt-names > + - interrupts > + - power-domains > + - reg > + - reg-names > + - vdda-supply > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/qcom,gcc-msm8974.h> > + #include <dt-bindings/clock/qcom,mmcc-msm8974.h> > + camss@fda00000 { Generic node name, so "isp" I guess? > + compatible = "qcom,msm8974-camss"; > + reg = <0xfda0ac00 0x200>, > + <0xfda00030 0x4>, > + <0xfda0b000 0x200>, > + <0xfda00038 0x4>, > + <0xfda0b400 0x200>, > + <0xfda00040 0x4>, > + <0xfda08000 0x100>, > + <0xfda08400 0x100>, > + <0xfda08800 0x100>, > + <0xfda08c00 0x100>, > + <0xfda0a000 0x800>, > + <0xfda00020 0x10>, > + <0xfda10000 0x1000>, > + <0xfda14000 0x1000>; > + reg-names = "csiphy0", > + "csiphy0_clk_mux", > + "csiphy1", > + "csiphy1_clk_mux", > + "csiphy2", > + "csiphy2_clk_mux", > + "csid0", > + "csid1", > + "csid2", > + "csid3", > + "ispif", > + "csi_clk_mux", > + "vfe0", > + "vfe1"; > + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 53 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 54 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csiphy0", > + "csiphy1", > + "csiphy2", > + "csid0", > + "csid1", > + "csid2", > + "csid3", > + "ispif", > + "vfe0", > + "vfe1"; > + power-domains = <&mmcc CAMSS_VFE_GDSC>; > + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, > + <&mmcc CAMSS_ISPIF_AHB_CLK>, > + <&mmcc CAMSS_PHY0_CSI0PHYTIMER_CLK>, > + <&mmcc CAMSS_PHY1_CSI1PHYTIMER_CLK>, > + <&mmcc CAMSS_PHY2_CSI2PHYTIMER_CLK>, > + <&mmcc CAMSS_CSI0_AHB_CLK>, > + <&mmcc CAMSS_CSI0_CLK>, > + <&mmcc CAMSS_CSI0PHY_CLK>, > + <&mmcc CAMSS_CSI0PIX_CLK>, > + <&mmcc CAMSS_CSI0RDI_CLK>, > + <&mmcc CAMSS_CSI1_AHB_CLK>, > + <&mmcc CAMSS_CSI1_CLK>, > + <&mmcc CAMSS_CSI1PHY_CLK>, > + <&mmcc CAMSS_CSI1PIX_CLK>, > + <&mmcc CAMSS_CSI1RDI_CLK>, > + <&mmcc CAMSS_CSI2_AHB_CLK>, > + <&mmcc CAMSS_CSI2_CLK>, > + <&mmcc CAMSS_CSI2PHY_CLK>, > + <&mmcc CAMSS_CSI2PIX_CLK>, > + <&mmcc CAMSS_CSI2RDI_CLK>, > + <&mmcc CAMSS_CSI3_AHB_CLK>, > + <&mmcc CAMSS_CSI3_CLK>, > + <&mmcc CAMSS_CSI3PHY_CLK>, > + <&mmcc CAMSS_CSI3PIX_CLK>, > + <&mmcc CAMSS_CSI3RDI_CLK>, > + <&mmcc CAMSS_VFE_VFE0_CLK>, > + <&mmcc CAMSS_VFE_VFE1_CLK>, > + <&mmcc CAMSS_CSI_VFE0_CLK>, > + <&mmcc CAMSS_CSI_VFE1_CLK>, > + <&mmcc CAMSS_VFE_VFE_AHB_CLK>, > + <&mmcc CAMSS_VFE_VFE_AXI_CLK>; > + clock-names = "top_ahb", > + "ispif_ahb", > + "csiphy0_timer", > + "csiphy1_timer", > + "csiphy2_timer", > + "csi0_ahb", > + "csi0", > + "csi0_phy", > + "csi0_pix", > + "csi0_rdi", > + "csi1_ahb", > + "csi1", > + "csi1_phy", > + "csi1_pix", > + "csi1_rdi", > + "csi2_ahb", > + "csi2", > + "csi2_phy", > + "csi2_pix", > + "csi2_rdi", > + "csi3_ahb", > + "csi3", > + "csi3_phy", > + "csi3_pix", > + "csi3_rdi", > + "vfe0", > + "vfe1", > + "csi_vfe0", > + "csi_vfe1", > + "iface", > + "bus"; > + > + vdda-supply = <&pm8941_l12>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; This is not a complete example... empty ports node is useless, isn't it? > + }; > + }; Best regards, Krzysztof
On Mon, May 23, 2022 at 12:07:10PM +0200, Krzysztof Kozlowski wrote: > On 22/05/2022 18:27, Luca Weiss wrote: > > From: Matti Lehtimäki <matti.lehtimaki@gmail.com> > > Thank you for your patch. There is something to discuss/improve. > > > > > Add bindings for qcom,msm8974-camss in order to support the camera > > subsystem on MSM8974. > > > > Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> > > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > > --- > > .../bindings/media/qcom,msm8974-camss.yaml | 321 ++++++++++++++++++ > > 1 file changed, 321 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > > > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > > new file mode 100644 > > index 000000000000..f8f71e477535 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml > > @@ -0,0 +1,321 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > + > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/media/qcom,msm8974-camss.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: Qualcomm CAMSS ISP > > + > > +maintainers: > > + - Robert Foss <robert.foss@linaro.org> > > + > > +description: | > > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms > > + > > +properties: > > + compatible: > > + const: qcom,msm8974-camss > > + > > + clocks: > > + minItems: 31 > > No need for minItems, they are equal to max by default. > > > + maxItems: 31 > > + > > + clock-names: > > + items: > > + - const: top_ahb > > + - const: ispif_ahb > > + - const: csiphy0_timer > > + - const: csiphy1_timer > > + - const: csiphy2_timer > > + - const: csi0_ahb > > + - const: csi0 > > + - const: csi0_phy > > + - const: csi0_pix > > + - const: csi0_rdi > > + - const: csi1_ahb > > + - const: csi1 > > + - const: csi1_phy > > + - const: csi1_pix > > + - const: csi1_rdi > > + - const: csi2_ahb > > + - const: csi2 > > + - const: csi2_phy > > + - const: csi2_pix > > + - const: csi2_rdi > > + - const: csi3_ahb > > + - const: csi3 > > + - const: csi3_phy > > + - const: csi3_pix > > + - const: csi3_rdi > > + - const: vfe0 > > + - const: vfe1 > > + - const: csi_vfe0 > > + - const: csi_vfe1 > > + - const: iface > > + - const: bus > > + > > + interrupts: > > + minItems: 10 > > Same. > > > + maxItems: 10 > > + > > + interrupt-names: > > + items: > > + - const: csiphy0 > > + - const: csiphy1 > > + - const: csiphy2 > > + - const: csid0 > > + - const: csid1 > > + - const: csid2 > > + - const: csid3 > > + - const: ispif > > + - const: vfe0 > > + - const: vfe1 > > + > > + power-domains: > > + items: > > + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. > > + > > + ports: > > + $ref: /schemas/graph.yaml#/properties/ports > > + > > + description: > > + CSI input ports. > > + > > + properties: > > + port@0: > > + $ref: /schemas/graph.yaml#/$defs/port-base > > + unevaluatedProperties: false > > + description: > > + Input port for receiving CSI data. > > + > > + properties: > > + endpoint: > > + $ref: video-interfaces.yaml# > > + unevaluatedProperties: false > > + > > + properties: > > + clock-lanes: > > + items: > > + - const: 1 > > + > > + data-lanes: > > + minItems: 1 > > + maxItems: 4 > > + > > + required: > > + - clock-lanes > > + - data-lanes > > + > > + port@1: > > These look all the same, so just use patternPropreties (in "ports") with > proper pattern. That's fine, but whatever difference there is in ports 0, 1, and 2 needs to be described. > > + $ref: /schemas/graph.yaml#/$defs/port-base > > + unevaluatedProperties: false > > + description: > > + Input port for receiving CSI data.
diff --git a/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml new file mode 100644 index 000000000000..f8f71e477535 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8974-camss.yaml @@ -0,0 +1,321 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/qcom,msm8974-camss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm CAMSS ISP + +maintainers: + - Robert Foss <robert.foss@linaro.org> + +description: | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8974-camss + + clocks: + minItems: 31 + maxItems: 31 + + clock-names: + items: + - const: top_ahb + - const: ispif_ahb + - const: csiphy0_timer + - const: csiphy1_timer + - const: csiphy2_timer + - const: csi0_ahb + - const: csi0 + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1_ahb + - const: csi1 + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: csi2_ahb + - const: csi2 + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + - const: csi3_ahb + - const: csi3 + - const: csi3_phy + - const: csi3_pix + - const: csi3_rdi + - const: vfe0 + - const: vfe1 + - const: csi_vfe0 + - const: csi_vfe1 + - const: iface + - const: bus + + interrupts: + minItems: 10 + maxItems: 10 + + interrupt-names: + items: + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid3 + - const: ispif + - const: vfe0 + - const: vfe1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + items: + - const: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + items: + - const: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + items: + - const: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + reg: + minItems: 14 + maxItems: 14 + + reg-names: + items: + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csiphy2 + - const: csiphy2_clk_mux + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid3 + - const: ispif + - const: csi_clk_mux + - const: vfe0 + - const: vfe1 + + vdda-supply: + description: + Definition of the regulator used as analog power supply. + +required: + - clock-names + - clocks + - compatible + - interrupt-names + - interrupts + - power-domains + - reg + - reg-names + - vdda-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,gcc-msm8974.h> + #include <dt-bindings/clock/qcom,mmcc-msm8974.h> + camss@fda00000 { + compatible = "qcom,msm8974-camss"; + reg = <0xfda0ac00 0x200>, + <0xfda00030 0x4>, + <0xfda0b000 0x200>, + <0xfda00038 0x4>, + <0xfda0b400 0x200>, + <0xfda00040 0x4>, + <0xfda08000 0x100>, + <0xfda08400 0x100>, + <0xfda08800 0x100>, + <0xfda08c00 0x100>, + <0xfda0a000 0x800>, + <0xfda00020 0x10>, + <0xfda10000 0x1000>, + <0xfda14000 0x1000>; + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csiphy2", + "csiphy2_clk_mux", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "csi_clk_mux", + "vfe0", + "vfe1"; + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 53 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 54 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csiphy0", + "csiphy1", + "csiphy2", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "vfe0", + "vfe1"; + power-domains = <&mmcc CAMSS_VFE_GDSC>; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_ISPIF_AHB_CLK>, + <&mmcc CAMSS_PHY0_CSI0PHYTIMER_CLK>, + <&mmcc CAMSS_PHY1_CSI1PHYTIMER_CLK>, + <&mmcc CAMSS_PHY2_CSI2PHYTIMER_CLK>, + <&mmcc CAMSS_CSI0_AHB_CLK>, + <&mmcc CAMSS_CSI0_CLK>, + <&mmcc CAMSS_CSI0PHY_CLK>, + <&mmcc CAMSS_CSI0PIX_CLK>, + <&mmcc CAMSS_CSI0RDI_CLK>, + <&mmcc CAMSS_CSI1_AHB_CLK>, + <&mmcc CAMSS_CSI1_CLK>, + <&mmcc CAMSS_CSI1PHY_CLK>, + <&mmcc CAMSS_CSI1PIX_CLK>, + <&mmcc CAMSS_CSI1RDI_CLK>, + <&mmcc CAMSS_CSI2_AHB_CLK>, + <&mmcc CAMSS_CSI2_CLK>, + <&mmcc CAMSS_CSI2PHY_CLK>, + <&mmcc CAMSS_CSI2PIX_CLK>, + <&mmcc CAMSS_CSI2RDI_CLK>, + <&mmcc CAMSS_CSI3_AHB_CLK>, + <&mmcc CAMSS_CSI3_CLK>, + <&mmcc CAMSS_CSI3PHY_CLK>, + <&mmcc CAMSS_CSI3PIX_CLK>, + <&mmcc CAMSS_CSI3RDI_CLK>, + <&mmcc CAMSS_VFE_VFE0_CLK>, + <&mmcc CAMSS_VFE_VFE1_CLK>, + <&mmcc CAMSS_CSI_VFE0_CLK>, + <&mmcc CAMSS_CSI_VFE1_CLK>, + <&mmcc CAMSS_VFE_VFE_AHB_CLK>, + <&mmcc CAMSS_VFE_VFE_AXI_CLK>; + clock-names = "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csiphy2_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csi3_ahb", + "csi3", + "csi3_phy", + "csi3_pix", + "csi3_rdi", + "vfe0", + "vfe1", + "csi_vfe0", + "csi_vfe1", + "iface", + "bus"; + + vdda-supply = <&pm8941_l12>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + };