| Message ID | 20220615045146.3134420-1-judyhsiao@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] arm64: dts: rk3399: i2s: switch BCLK to GPIO | expand |
Hi, Normally the subject should look like "[PATCH v1] ...", not just "[v1] ...". On Wed, Jun 15, 2022 at 04:51:46AM +0000, Judy Hsiao wrote: > We discoverd that the state of BCLK on, LRCLK off and SD_MODE on > may cause the speaker melting issue. Removing LRCLK while BCLK > is present can cause unexpected output behavior including a large > DC output voltage as described in the Max98357a datasheet. > > In order to: > 1. prevent BCLK from turning on by other component. > 2. keep BCLK and LRCLK being present at the same time > > This patch adjusts the device tree to allow BCLK to switch > to GPIO func before LRCLK output, and switch back during > LRCLK is output. I get how this "allows" switching, but it seems like this would make more sense in a patch series that implements the switching. I'm also not certain, but it might be worth adding this to the DT binding, so we set the 'pinctrl-names' piece (which presumably you need to use in a driver) in stone. > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi ... > @@ -2225,6 +2226,8 @@ pcfg_input_pull_down: pcfg-input-pull-down { > input-enable; > bias-pull-down; > drive-strength = <2>; > + pcfg_pull_none_hiz: pcfg-pull-none-hiz { > + bias-disable; > }; This isn't valid syntax. You probably didn't resolve conflicts correctly when rebasing a patch? You need an extra brace somewhere. Also, this definition seems like it belongs next to 'pcfg_pull_none' (around line 2138), or at least somewhere near the other 'pcfg_pull_*' handles. Brian > > clock {
Hi Judy,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on v5.19-rc2 next-20220616]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Judy-Hsiao/arm64-dts-rk3399-i2s-switch-BCLK-to-GPIO/20220615-125441
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: arm64-defconfig (https://download.01.org/0day-ci/archive/20220617/202206171259.Mm7iOW4r-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/1fba583f1d6efea74ff18356d44566c17fbdc4a1
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Judy-Hsiao/arm64-dts-rk3399-i2s-switch-BCLK-to-GPIO/20220615-125441
git checkout 1fba583f1d6efea74ff18356d44566c17fbdc4a1
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> Error: arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi:6.1-2 syntax error
FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm64/boot/dts/rockchip/rk3399-evb.dts:10.1-2 syntax error
FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi:6.1-2 syntax error
FATAL ERROR: Unable to parse input tree
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi index 913d845eb51a..df1647e9d487 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi @@ -766,6 +766,16 @@ &i2s0_8ch_bus { <4 RK_PA0 1 &pcfg_pull_none_6ma>; }; +&i2s0_8ch_bus_bclk_off { + rockchip,pins = + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none_6ma>, + <3 RK_PD1 1 &pcfg_pull_none_6ma>, + <3 RK_PD2 1 &pcfg_pull_none_6ma>, + <3 RK_PD3 1 &pcfg_pull_none_6ma>, + <3 RK_PD7 1 &pcfg_pull_none_6ma>, + <4 RK_PA0 1 &pcfg_pull_none_6ma>; +}; + /* there is no external pull up, so need to set this pin pull up */ &sdmmc_cd_pin { rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index fbd0346624e6..60d8cb32cec8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1662,9 +1662,10 @@ i2s0: i2s@ff880000 { dma-names = "tx", "rx"; clock-names = "i2s_clk", "i2s_hclk"; clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>; - pinctrl-names = "default"; + pinctrl-names = "bclk_on", "bclk_off"; pinctrl-0 = <&i2s0_8ch_bus>; power-domains = <&power RK3399_PD_SDIOAUDIO>; + pinctrl-1 = <&i2s0_8ch_bus_bclk_off>; #sound-dai-cells = <0>; status = "disabled"; }; @@ -2225,6 +2226,8 @@ pcfg_input_pull_down: pcfg-input-pull-down { input-enable; bias-pull-down; drive-strength = <2>; + pcfg_pull_none_hiz: pcfg-pull-none-hiz { + bias-disable; }; clock { @@ -2407,6 +2410,19 @@ i2s0_8ch_bus: i2s0-8ch-bus { <3 RK_PD7 1 &pcfg_pull_none>, <4 RK_PA0 1 &pcfg_pull_none>; }; + + i2s0_8ch_bus_bclk_off: i2s0-8ch-bus-bclk-off { + rockchip,pins = + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none_hiz>, + <3 RK_PD1 1 &pcfg_pull_none>, + <3 RK_PD2 1 &pcfg_pull_none>, + <3 RK_PD3 1 &pcfg_pull_none>, + <3 RK_PD4 1 &pcfg_pull_none>, + <3 RK_PD5 1 &pcfg_pull_none>, + <3 RK_PD6 1 &pcfg_pull_none>, + <3 RK_PD7 1 &pcfg_pull_none>, + <4 RK_PA0 1 &pcfg_pull_none>; + }; }; i2s1 { @@ -2418,6 +2434,15 @@ i2s1_2ch_bus: i2s1-2ch-bus { <4 RK_PA6 1 &pcfg_pull_none>, <4 RK_PA7 1 &pcfg_pull_none>; }; + + i2s1_2ch_bus_bclk_off: i2s1-2ch-bus-bclk-off { + rockchip,pins = + <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none_hiz>, + <4 RK_PA4 1 &pcfg_pull_none>, + <4 RK_PA5 1 &pcfg_pull_none>, + <4 RK_PA6 1 &pcfg_pull_none>, + <4 RK_PA7 1 &pcfg_pull_none>; + }; }; sdio0 {
We discoverd that the state of BCLK on, LRCLK off and SD_MODE on may cause the speaker melting issue. Removing LRCLK while BCLK is present can cause unexpected output behavior including a large DC output voltage as described in the Max98357a datasheet. In order to: 1. prevent BCLK from turning on by other component. 2. keep BCLK and LRCLK being present at the same time This patch adjusts the device tree to allow BCLK to switch to GPIO func before LRCLK output, and switch back during LRCLK is output. Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> --- .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 10 +++++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 27 ++++++++++++++++++- 2 files changed, 36 insertions(+), 1 deletion(-)