| Message ID | 20220614191127.3420492-27-paul.elder@ideasonboard.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | media: rkisp1: Cleanups and add support for i.MX8MP | expand |
On 15.06.2022 04:10, Paul Elder wrote: >From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > >To prepare for the removal of the active_sensor field from the >rkisp1_device structure, pass the media bus type of flag to the >rkisp1_config_cif() function instead of accessing them through >active_sensor. > >Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by Dafna Hirschfeld <dafna@fastmail.com> >--- > .../platform/rockchip/rkisp1/rkisp1-isp.c | 44 +++++++++---------- > 1 file changed, 22 insertions(+), 22 deletions(-) > >diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >index a234cf29ec67..f6d1c93dd99d 100644 >--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >@@ -136,15 +136,14 @@ static void rkisp1_config_ism(struct rkisp1_device *rkisp1) > /* > * configure ISP blocks with input format, size...... > */ >-static int rkisp1_config_isp(struct rkisp1_device *rkisp1) >+static int rkisp1_config_isp(struct rkisp1_device *rkisp1, >+ enum v4l2_mbus_type mbus_type, u32 mbus_flags) > { > u32 isp_ctrl = 0, irq_mask = 0, acq_mult = 0, signal = 0; > const struct rkisp1_mbus_info *src_fmt, *sink_fmt; >- struct rkisp1_sensor_async *sensor; > struct v4l2_mbus_framefmt *sink_frm; > struct v4l2_rect *sink_crop; > >- sensor = rkisp1->active_sensor; > sink_fmt = rkisp1->isp.sink_fmt; > src_fmt = rkisp1->isp.src_fmt; > sink_frm = rkisp1_isp_get_pad_fmt(&rkisp1->isp, NULL, >@@ -157,7 +156,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) > if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { > acq_mult = 1; > if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { >- if (sensor->mbus_type == V4L2_MBUS_BT656) >+ if (mbus_type == V4L2_MBUS_BT656) > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; > else > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT; >@@ -165,17 +164,17 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) > rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC, > RKISP1_CIF_ISP_DEMOSAIC_TH(0xc)); > >- if (sensor->mbus_type == V4L2_MBUS_BT656) >+ if (mbus_type == V4L2_MBUS_BT656) > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656; > else > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; > } > } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) { > acq_mult = 2; >- if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { >+ if (mbus_type == V4L2_MBUS_CSI2_DPHY) { > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; > } else { >- if (sensor->mbus_type == V4L2_MBUS_BT656) >+ if (mbus_type == V4L2_MBUS_BT656) > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656; > else > isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; >@@ -185,17 +184,16 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) > } > > /* Set up input acquisition properties */ >- if (sensor->mbus_type == V4L2_MBUS_BT656 || >- sensor->mbus_type == V4L2_MBUS_PARALLEL) { >- if (sensor->mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) >+ if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL) { >+ if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) > signal = RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE; > } > >- if (sensor->mbus_type == V4L2_MBUS_PARALLEL) { >- if (sensor->mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) >+ if (mbus_type == V4L2_MBUS_PARALLEL) { >+ if (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) > signal |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW; > >- if (sensor->mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) >+ if (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) > signal |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW; > } > >@@ -265,17 +263,17 @@ static int rkisp1_config_dvp(struct rkisp1_device *rkisp1) > } > > /* Configure MUX */ >-static int rkisp1_config_path(struct rkisp1_device *rkisp1) >+static int rkisp1_config_path(struct rkisp1_device *rkisp1, >+ enum v4l2_mbus_type mbus_type) > { >- struct rkisp1_sensor_async *sensor = rkisp1->active_sensor; > u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL); > int ret = 0; > >- if (sensor->mbus_type == V4L2_MBUS_BT656 || >- sensor->mbus_type == V4L2_MBUS_PARALLEL) { >+ if (mbus_type == V4L2_MBUS_BT656 || >+ mbus_type == V4L2_MBUS_PARALLEL) { > ret = rkisp1_config_dvp(rkisp1); > dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL; >- } else if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { >+ } else if (mbus_type == V4L2_MBUS_CSI2_DPHY) { > dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI; > } > >@@ -285,14 +283,15 @@ static int rkisp1_config_path(struct rkisp1_device *rkisp1) > } > > /* Hardware configure Entry */ >-static int rkisp1_config_cif(struct rkisp1_device *rkisp1) >+static int rkisp1_config_cif(struct rkisp1_device *rkisp1, >+ enum v4l2_mbus_type mbus_type, u32 mbus_flags) > { > int ret; > >- ret = rkisp1_config_isp(rkisp1); >+ ret = rkisp1_config_isp(rkisp1, mbus_type, mbus_flags); > if (ret) > return ret; >- ret = rkisp1_config_path(rkisp1); >+ ret = rkisp1_config_path(rkisp1, mbus_type); > if (ret) > return ret; > rkisp1_config_ism(rkisp1); >@@ -777,7 +776,8 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) > > rkisp1->isp.frame_sequence = -1; > mutex_lock(&isp->ops_lock); >- ret = rkisp1_config_cif(rkisp1); >+ ret = rkisp1_config_cif(rkisp1, rkisp1->active_sensor->mbus_type, >+ rkisp1->active_sensor->mbus_flags); > if (ret) > goto mutex_unlock; > >-- >2.30.2 >
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c index a234cf29ec67..f6d1c93dd99d 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c @@ -136,15 +136,14 @@ static void rkisp1_config_ism(struct rkisp1_device *rkisp1) /* * configure ISP blocks with input format, size...... */ -static int rkisp1_config_isp(struct rkisp1_device *rkisp1) +static int rkisp1_config_isp(struct rkisp1_device *rkisp1, + enum v4l2_mbus_type mbus_type, u32 mbus_flags) { u32 isp_ctrl = 0, irq_mask = 0, acq_mult = 0, signal = 0; const struct rkisp1_mbus_info *src_fmt, *sink_fmt; - struct rkisp1_sensor_async *sensor; struct v4l2_mbus_framefmt *sink_frm; struct v4l2_rect *sink_crop; - sensor = rkisp1->active_sensor; sink_fmt = rkisp1->isp.sink_fmt; src_fmt = rkisp1->isp.src_fmt; sink_frm = rkisp1_isp_get_pad_fmt(&rkisp1->isp, NULL, @@ -157,7 +156,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { acq_mult = 1; if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { - if (sensor->mbus_type == V4L2_MBUS_BT656) + if (mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT; @@ -165,17 +164,17 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC, RKISP1_CIF_ISP_DEMOSAIC_TH(0xc)); - if (sensor->mbus_type == V4L2_MBUS_BT656) + if (mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; } } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) { acq_mult = 2; - if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { + if (mbus_type == V4L2_MBUS_CSI2_DPHY) { isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; } else { - if (sensor->mbus_type == V4L2_MBUS_BT656) + if (mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; @@ -185,17 +184,16 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) } /* Set up input acquisition properties */ - if (sensor->mbus_type == V4L2_MBUS_BT656 || - sensor->mbus_type == V4L2_MBUS_PARALLEL) { - if (sensor->mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) + if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL) { + if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) signal = RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE; } - if (sensor->mbus_type == V4L2_MBUS_PARALLEL) { - if (sensor->mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) + if (mbus_type == V4L2_MBUS_PARALLEL) { + if (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) signal |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW; - if (sensor->mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) + if (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) signal |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW; } @@ -265,17 +263,17 @@ static int rkisp1_config_dvp(struct rkisp1_device *rkisp1) } /* Configure MUX */ -static int rkisp1_config_path(struct rkisp1_device *rkisp1) +static int rkisp1_config_path(struct rkisp1_device *rkisp1, + enum v4l2_mbus_type mbus_type) { - struct rkisp1_sensor_async *sensor = rkisp1->active_sensor; u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL); int ret = 0; - if (sensor->mbus_type == V4L2_MBUS_BT656 || - sensor->mbus_type == V4L2_MBUS_PARALLEL) { + if (mbus_type == V4L2_MBUS_BT656 || + mbus_type == V4L2_MBUS_PARALLEL) { ret = rkisp1_config_dvp(rkisp1); dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL; - } else if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { + } else if (mbus_type == V4L2_MBUS_CSI2_DPHY) { dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI; } @@ -285,14 +283,15 @@ static int rkisp1_config_path(struct rkisp1_device *rkisp1) } /* Hardware configure Entry */ -static int rkisp1_config_cif(struct rkisp1_device *rkisp1) +static int rkisp1_config_cif(struct rkisp1_device *rkisp1, + enum v4l2_mbus_type mbus_type, u32 mbus_flags) { int ret; - ret = rkisp1_config_isp(rkisp1); + ret = rkisp1_config_isp(rkisp1, mbus_type, mbus_flags); if (ret) return ret; - ret = rkisp1_config_path(rkisp1); + ret = rkisp1_config_path(rkisp1, mbus_type); if (ret) return ret; rkisp1_config_ism(rkisp1); @@ -777,7 +776,8 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) rkisp1->isp.frame_sequence = -1; mutex_lock(&isp->ops_lock); - ret = rkisp1_config_cif(rkisp1); + ret = rkisp1_config_cif(rkisp1, rkisp1->active_sensor->mbus_type, + rkisp1->active_sensor->mbus_flags); if (ret) goto mutex_unlock;