| Message ID | 20220701192609.3970317-3-colin.foster@in-advantage.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | add support for VSC7512 control over SPI | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/fixes_present | success | Fixes tag not required for -next series |
| netdev/subject_prefix | success | Link |
| netdev/cover_letter | success | Series has a cover letter |
| netdev/patch_count | success | Link |
| netdev/header_inline | success | No static functions without inline keyword in header files |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/cc_maintainers | success | CCed 8 of 8 maintainers |
| netdev/build_clang | success | Errors and warnings before: 0 this patch: 0 |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
| netdev/check_selftest | success | No net selftest shell script |
| netdev/verify_fixes | success | No Fixes tag |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/checkpatch | warning | CHECK: Alignment should match open parenthesis |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/source_inline | success | Was 0 now: 0 |
On Fri, Jul 1, 2022 at 9:26 PM Colin Foster <colin.foster@in-advantage.com> wrote: > > There are a few Ocelot chips that contain the logic for this bus, but are > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In > the externally controlled configurations these registers are not > memory-mapped. > > Add support for these non-memory-mapped configurations. ... > + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, > + &mscc_miim_phy_regmap_config); > + if (IS_ERR(phy_regmap)) { > + dev_err(dev, "Unable to create phy register regmap\n"); > + return PTR_ERR(phy_regmap); return dev_err_probe(...); ? > }
On Fri, Jul 01, 2022 at 10:24:46PM +0200, Andy Shevchenko wrote: > On Fri, Jul 1, 2022 at 9:26 PM Colin Foster > <colin.foster@in-advantage.com> wrote: > > > > There are a few Ocelot chips that contain the logic for this bus, but are > > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In > > the externally controlled configurations these registers are not > > memory-mapped. > > > > Add support for these non-memory-mapped configurations. > > ... > > > + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, > > + &mscc_miim_phy_regmap_config); > > + if (IS_ERR(phy_regmap)) { > > + dev_err(dev, "Unable to create phy register regmap\n"); > > + return PTR_ERR(phy_regmap); > > return dev_err_probe(...); ? Thanks. Also the same is in pinctrl-ocelot. Fixing in my tree right now. > > > } > > -- > With Best Regards, > Andy Shevchenko
diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c index 08541007b18a..c23a9fb5238c 100644 --- a/drivers/net/mdio/mdio-mscc-miim.c +++ b/drivers/net/mdio/mdio-mscc-miim.c @@ -12,6 +12,7 @@ #include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/mdio/mdio-mscc-miim.h> +#include <linux/mfd/ocelot.h> #include <linux/module.h> #include <linux/of_mdio.h> #include <linux/phy.h> @@ -270,43 +271,26 @@ static int mscc_miim_clk_set(struct mii_bus *bus) static int mscc_miim_probe(struct platform_device *pdev) { - struct regmap *mii_regmap, *phy_regmap = NULL; struct device_node *np = pdev->dev.of_node; + struct regmap *mii_regmap, *phy_regmap; struct device *dev = &pdev->dev; - void __iomem *regs, *phy_regs; struct mscc_miim_dev *miim; - struct resource *res; struct mii_bus *bus; int ret; - regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); - if (IS_ERR(regs)) { - dev_err(dev, "Unable to map MIIM registers\n"); - return PTR_ERR(regs); - } - - mii_regmap = devm_regmap_init_mmio(dev, regs, &mscc_miim_regmap_config); - + mii_regmap = ocelot_regmap_from_resource(pdev, 0, + &mscc_miim_regmap_config); if (IS_ERR(mii_regmap)) { dev_err(dev, "Unable to create MIIM regmap\n"); return PTR_ERR(mii_regmap); } /* This resource is optional */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (res) { - phy_regs = devm_ioremap_resource(dev, res); - if (IS_ERR(phy_regs)) { - dev_err(dev, "Unable to map internal phy registers\n"); - return PTR_ERR(phy_regs); - } - - phy_regmap = devm_regmap_init_mmio(dev, phy_regs, - &mscc_miim_phy_regmap_config); - if (IS_ERR(phy_regmap)) { - dev_err(dev, "Unable to create phy register regmap\n"); - return PTR_ERR(phy_regmap); - } + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, + &mscc_miim_phy_regmap_config); + if (IS_ERR(phy_regmap)) { + dev_err(dev, "Unable to create phy register regmap\n"); + return PTR_ERR(phy_regmap); } ret = mscc_miim_setup(dev, &bus, "mscc_miim", mii_regmap, 0);
There are a few Ocelot chips that contain the logic for this bus, but are controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> --- drivers/net/mdio/mdio-mscc-miim.c | 34 ++++++++----------------------- 1 file changed, 9 insertions(+), 25 deletions(-)