| Message ID | 20220704113246.622917-1-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: ipq8074: move ARMv8 timer out of SoC node | expand |
On 04/07/2022 13:32, Robert Marko wrote: > The ARM timer is usually considered not part of SoC node, just like > other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: > > arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} > From schema: dtschema/schemas/simple-bus.yaml > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > This is a duplicate, I guess... I responded to newer patch. Best regards, Krzysztof
On Mon, 4 Jul 2022 at 14:30, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 04/07/2022 13:32, Robert Marko wrote: > > The ARM timer is usually considered not part of SoC node, just like > > other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: > > > > arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} > > From schema: dtschema/schemas/simple-bus.yaml > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > This is a duplicate, I guess... I responded to newer patch. Yeah, git-send mail failed the first time so I resent but it actually succeeded the first time as well. Sorry for the confusion. Regards, Robert > > > Best regards, > Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index e0bd202e4eae..9f5798f4825d 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -143,6 +143,14 @@ m3_dump_region: m3_dump@51000000 { }; }; + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + firmware { scm { compatible = "qcom,scm-ipq8074", "qcom,scm"; @@ -852,14 +860,6 @@ gic_v2m0: v2m@0 { }; }; - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - watchdog: watchdog@b017000 { compatible = "qcom,kpss-wdt"; reg = <0xb017000 0x1000>;
The ARM timer is usually considered not part of SoC node, just like other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)