diff mbox series

[v8,01/15] dt-bindings: clk: imx: Add fsl,scu-clk yaml file

Message ID 20220707125022.1156498-2-viorel.suman@oss.nxp.com (mailing list archive)
State New, archived
Headers show
Series dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml | expand

Commit Message

Viorel Suman (OSS) July 7, 2022, 12:50 p.m. UTC
From: Abel Vesa <abel.vesa@nxp.com>

In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'clock' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/arm/freescale/fsl,scu.txt        | 31 -------------
 .../bindings/clock/fsl,scu-clk.yaml           | 43 +++++++++++++++++++
 2 files changed, 43 insertions(+), 31 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml

Comments

Abel Vesa July 11, 2022, 11:10 a.m. UTC | #1
On 22-07-07 15:50:08, Viorel Suman (OSS) wrote:
> From: Abel Vesa <abel.vesa@nxp.com>
>
> In order to replace the fsl,scu txt file from bindings/arm/freescale,
> we need to split it between the right subsystems. This patch documents
> separately the 'clock' child node of the SCU main node.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
> Acked-by: Stephen Boyd <sboyd@kernel.org>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Shawn, I'm assuming you're going to pick this up through your tree,
right?

> ---
>  .../bindings/arm/freescale/fsl,scu.txt        | 31 -------------
>  .../bindings/clock/fsl,scu-clk.yaml           | 43 +++++++++++++++++++
>  2 files changed, 43 insertions(+), 31 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> index a87ec15e28d2..ef7f5222ac48 100644
> --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> @@ -79,29 +79,6 @@ Required properties:
>  			See detailed Resource ID list from:
>  			include/dt-bindings/firmware/imx/rsrc.h
>
> -Clock bindings based on SCU Message Protocol
> -------------------------------------------------------------
> -
> -This binding uses the common clock binding[1].
> -
> -Required properties:
> -- compatible:		Should be one of:
> -			  "fsl,imx8dxl-clk"
> -			  "fsl,imx8qm-clk"
> -			  "fsl,imx8qxp-clk"
> -			followed by "fsl,scu-clk"
> -- #clock-cells:		Should be 2.
> -			Contains the Resource and Clock ID value.
> -- clocks:		List of clock specifiers, must contain an entry for
> -			each required entry in clock-names
> -- clock-names:		Should include entries "xtal_32KHz", "xtal_24MHz"
> -
> -The clock consumer should specify the desired clock by having the clock
> -ID in its "clocks" phandle cell.
> -
> -See the full list of clock IDs from:
> -include/dt-bindings/clock/imx8qxp-clock.h
> -
>  Pinctrl bindings based on SCU Message Protocol
>  ------------------------------------------------------------
>
> @@ -127,7 +104,6 @@ Required properties for Pinctrl sub nodes:
>  			Please refer to i.MX8QXP Reference Manual for detailed
>  			CONFIG settings.
>
> -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
>  [2] Documentation/devicetree/bindings/power/power-domain.yaml
>  [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
>
> @@ -208,11 +184,6 @@ firmware {
>  			  &lsio_mu1 1 3
>  			  &lsio_mu1 3 3>;
>
> -		clk: clk {
> -			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> -			#clock-cells = <2>;
> -		};
> -
>  		iomuxc {
>  			compatible = "fsl,imx8qxp-iomuxc";
>
> @@ -265,7 +236,5 @@ serial@5a060000 {
>  	...
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_lpuart0>;
> -	clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
> -	clock-names = "ipg";
>  	power-domains = <&pd IMX_SC_R_UART_0>;
>  };
> diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
> new file mode 100644
> index 000000000000..f2c48460a399
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Abel Vesa <abel.vesa@nxp.com>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +  This binding uses the common clock binding.
> +  (Documentation/devicetree/bindings/clock/clock-bindings.txt)
> +  The clock consumer should specify the desired clock by having the clock
> +  ID in its "clocks" phandle cell. See the full list of clock IDs from
> +  include/dt-bindings/clock/imx8qxp-clock.h
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - fsl,imx8dxl-clk
> +          - fsl,imx8qm-clk
> +          - fsl,imx8qxp-clk
> +      - const: fsl,scu-clk
> +
> +  '#clock-cells':
> +    const: 2
> +
> +required:
> +  - compatible
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller {
> +        compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> +        #clock-cells = <2>;
> +    };
> --
> 2.25.1
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
index a87ec15e28d2..ef7f5222ac48 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
@@ -79,29 +79,6 @@  Required properties:
 			See detailed Resource ID list from:
 			include/dt-bindings/firmware/imx/rsrc.h
 
-Clock bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-This binding uses the common clock binding[1].
-
-Required properties:
-- compatible:		Should be one of:
-			  "fsl,imx8dxl-clk"
-			  "fsl,imx8qm-clk"
-			  "fsl,imx8qxp-clk"
-			followed by "fsl,scu-clk"
-- #clock-cells:		Should be 2.
-			Contains the Resource and Clock ID value.
-- clocks:		List of clock specifiers, must contain an entry for
-			each required entry in clock-names
-- clock-names:		Should include entries "xtal_32KHz", "xtal_24MHz"
-
-The clock consumer should specify the desired clock by having the clock
-ID in its "clocks" phandle cell.
-
-See the full list of clock IDs from:
-include/dt-bindings/clock/imx8qxp-clock.h
-
 Pinctrl bindings based on SCU Message Protocol
 ------------------------------------------------------------
 
@@ -127,7 +104,6 @@  Required properties for Pinctrl sub nodes:
 			Please refer to i.MX8QXP Reference Manual for detailed
 			CONFIG settings.
 
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
 [2] Documentation/devicetree/bindings/power/power-domain.yaml
 [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
 
@@ -208,11 +184,6 @@  firmware {
 			  &lsio_mu1 1 3
 			  &lsio_mu1 3 3>;
 
-		clk: clk {
-			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
-			#clock-cells = <2>;
-		};
-
 		iomuxc {
 			compatible = "fsl,imx8qxp-iomuxc";
 
@@ -265,7 +236,5 @@  serial@5a060000 {
 	...
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_lpuart0>;
-	clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
-	clock-names = "ipg";
 	power-domains = <&pd IMX_SC_R_UART_0>;
 };
diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
new file mode 100644
index 000000000000..f2c48460a399
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml
@@ -0,0 +1,43 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
+
+maintainers:
+  - Abel Vesa <abel.vesa@nxp.com>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+  This binding uses the common clock binding.
+  (Documentation/devicetree/bindings/clock/clock-bindings.txt)
+  The clock consumer should specify the desired clock by having the clock
+  ID in its "clocks" phandle cell. See the full list of clock IDs from
+  include/dt-bindings/clock/imx8qxp-clock.h
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8dxl-clk
+          - fsl,imx8qm-clk
+          - fsl,imx8qxp-clk
+      - const: fsl,scu-clk
+
+  '#clock-cells':
+    const: 2
+
+required:
+  - compatible
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller {
+        compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
+        #clock-cells = <2>;
+    };