diff mbox series

[2/2] dt-bindings: PCI: mediatek-gen3: Add new clock name

Message ID 20220716074349.28655-3-jianjun.wang@mediatek.com (mailing list archive)
State New, archived
Headers show
Series dt-bindings: PCI: mediatek-gen3: Add support for MT8188 and MT8195 | expand

Commit Message

Jianjun Wang (王建军) July 16, 2022, 7:43 a.m. UTC
MT8188 and MT8195 use clock "peri_mem" instead of "top_133m", add new
clock name "peri_mem" for MT8188 and MT8195.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
---
 .../bindings/pci/mediatek-pcie-gen3.yaml      | 42 ++++++++++++++-----
 1 file changed, 32 insertions(+), 10 deletions(-)

Comments

Rob Herring (Arm) July 20, 2022, 10:24 p.m. UTC | #1
On Sat, Jul 16, 2022 at 03:43:49PM +0800, Jianjun Wang wrote:
> MT8188 and MT8195 use clock "peri_mem" instead of "top_133m", add new
> clock name "peri_mem" for MT8188 and MT8195.

This should be part of patch 1.

Clock names for IP blocks should be local to the IP block. IOW, named 
after the input name for the clocks or what their function is if you 
don't know that. Neither the old names nor the new name seem to follow 
this. At least make the new name follow that convention.

> 
> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> ---
>  .../bindings/pci/mediatek-pcie-gen3.yaml      | 42 ++++++++++++++-----
>  1 file changed, 32 insertions(+), 10 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index 67d2ba25e336..038e25ae0be7 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -43,9 +43,6 @@ description: |+
>    each set has its own address for MSI message, and supports 32 MSI vectors
>    to generate interrupt.
>  
> -allOf:
> -  - $ref: /schemas/pci/pci-bus.yaml#
> -
>  properties:
>    compatible:
>      oneOf:
> @@ -85,13 +82,7 @@ properties:
>      maxItems: 6
>  
>    clock-names:
> -    items:
> -      - const: pl_250m
> -      - const: tl_26m
> -      - const: tl_96m
> -      - const: tl_32k
> -      - const: peri_26m
> -      - const: top_133m
> +    maxItems: 6
>  
>    assigned-clocks:
>      maxItems: 1
> @@ -133,9 +124,40 @@ required:
>    - interrupts
>    - ranges
>    - clocks
> +  - clock-names
>    - '#interrupt-cells'
>    - interrupt-controller
>  
> +allOf:
> +  - $ref: /schemas/pci/pci-bus.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8188-pcie
> +              - mediatek,mt8195-pcie
> +    then:
> +      properties:
> +        clock-names:
> +          items:
> +            - const: pl_250m
> +            - const: tl_26m
> +            - const: tl_96m
> +            - const: tl_32k
> +            - const: peri_26m
> +            - const: peri_mem
> +    else:
> +      properties:
> +        clock-names:
> +          items:
> +            - const: pl_250m
> +            - const: tl_26m
> +            - const: tl_96m
> +            - const: tl_32k
> +            - const: peri_26m
> +            - const: top_133m
> +
>  unevaluatedProperties: false
>  
>  examples:
> -- 
> 2.18.0
> 
>
Jianjun Wang (王建军) July 21, 2022, 8:44 a.m. UTC | #2
Hi Rob,

Thanks for your comment.

On Wed, 2022-07-20 at 16:24 -0600, Rob Herring wrote:
> On Sat, Jul 16, 2022 at 03:43:49PM +0800, Jianjun Wang wrote:
> > MT8188 and MT8195 use clock "peri_mem" instead of "top_133m", add
> > new
> > clock name "peri_mem" for MT8188 and MT8195.
> 
> This should be part of patch 1.

Sure, I'll merge these two patches into one in the next version.

> 
> Clock names for IP blocks should be local to the IP block. IOW,
> named 
> after the input name for the clocks or what their function is if you 
> don't know that. Neither the old names nor the new name seem to
> follow 
> this. At least make the new name follow that convention.

Sorry, I'm not sure if I understand correctly, would you mind providing
an example of this change?

Thanks.

> 
> > 
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> >  .../bindings/pci/mediatek-pcie-gen3.yaml      | 42 ++++++++++++++-
> > ----
> >  1 file changed, 32 insertions(+), 10 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml
> > index 67d2ba25e336..038e25ae0be7 100644
> > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > @@ -43,9 +43,6 @@ description: |+
> >    each set has its own address for MSI message, and supports 32
> > MSI vectors
> >    to generate interrupt.
> >  
> > -allOf:
> > -  - $ref: /schemas/pci/pci-bus.yaml#
> > -
> >  properties:
> >    compatible:
> >      oneOf:
> > @@ -85,13 +82,7 @@ properties:
> >      maxItems: 6
> >  
> >    clock-names:
> > -    items:
> > -      - const: pl_250m
> > -      - const: tl_26m
> > -      - const: tl_96m
> > -      - const: tl_32k
> > -      - const: peri_26m
> > -      - const: top_133m
> > +    maxItems: 6
> >  
> >    assigned-clocks:
> >      maxItems: 1
> > @@ -133,9 +124,40 @@ required:
> >    - interrupts
> >    - ranges
> >    - clocks
> > +  - clock-names
> >    - '#interrupt-cells'
> >    - interrupt-controller
> >  
> > +allOf:
> > +  - $ref: /schemas/pci/pci-bus.yaml#
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - mediatek,mt8188-pcie
> > +              - mediatek,mt8195-pcie
> > +    then:
> > +      properties:
> > +        clock-names:
> > +          items:
> > +            - const: pl_250m
> > +            - const: tl_26m
> > +            - const: tl_96m
> > +            - const: tl_32k
> > +            - const: peri_26m
> > +            - const: peri_mem
> > +    else:
> > +      properties:
> > +        clock-names:
> > +          items:
> > +            - const: pl_250m
> > +            - const: tl_26m
> > +            - const: tl_96m
> > +            - const: tl_32k
> > +            - const: peri_26m
> > +            - const: top_133m
> > +
> >  unevaluatedProperties: false
> >  
> >  examples:
> > -- 
> > 2.18.0
> > 
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 67d2ba25e336..038e25ae0be7 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -43,9 +43,6 @@  description: |+
   each set has its own address for MSI message, and supports 32 MSI vectors
   to generate interrupt.
 
-allOf:
-  - $ref: /schemas/pci/pci-bus.yaml#
-
 properties:
   compatible:
     oneOf:
@@ -85,13 +82,7 @@  properties:
     maxItems: 6
 
   clock-names:
-    items:
-      - const: pl_250m
-      - const: tl_26m
-      - const: tl_96m
-      - const: tl_32k
-      - const: peri_26m
-      - const: top_133m
+    maxItems: 6
 
   assigned-clocks:
     maxItems: 1
@@ -133,9 +124,40 @@  required:
   - interrupts
   - ranges
   - clocks
+  - clock-names
   - '#interrupt-cells'
   - interrupt-controller
 
+allOf:
+  - $ref: /schemas/pci/pci-bus.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt8188-pcie
+              - mediatek,mt8195-pcie
+    then:
+      properties:
+        clock-names:
+          items:
+            - const: pl_250m
+            - const: tl_26m
+            - const: tl_96m
+            - const: tl_32k
+            - const: peri_26m
+            - const: peri_mem
+    else:
+      properties:
+        clock-names:
+          items:
+            - const: pl_250m
+            - const: tl_26m
+            - const: tl_96m
+            - const: tl_32k
+            - const: peri_26m
+            - const: top_133m
+
 unevaluatedProperties: false
 
 examples: