| Message ID | 20220719161328.7907-1-mario.limonciello@amd.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | crypto: ccp - Add support for new CCP/PSP device ID | expand |
On 7/19/22 11:13, Mario Limonciello wrote: > Add a new CCP/PSP PCI device ID. This uses same register offsets > as the previously supported structure. > > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> > --- > drivers/crypto/ccp/sp-pci.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c > index b5970ae54d0e..792d6da7f0c0 100644 > --- a/drivers/crypto/ccp/sp-pci.c > +++ b/drivers/crypto/ccp/sp-pci.c > @@ -427,6 +427,12 @@ static const struct sp_dev_vdata dev_vdata[] = { > .bar = 2, > #ifdef CONFIG_CRYPTO_DEV_SP_PSP > .psp_vdata = &pspv2, > +#endif > + }, > + { /* 6 */ > + .bar = 2, > +#ifdef CONFIG_CRYPTO_DEV_SP_PSP > + .psp_vdata = &pspv3, > #endif > }, > }; > @@ -438,6 +444,7 @@ static const struct pci_device_id sp_pci_table[] = { > { PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] }, > { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] }, > { PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] }, > + { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] }, > /* Last entry must be zero */ > { 0, } > };
On 7/20/2022 6:28 PM, Tom Lendacky wrote: > On 7/19/22 11:13, Mario Limonciello wrote: >> Add a new CCP/PSP PCI device ID. This uses same register offsets >> as the previously supported structure. >> >> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > > Acked-by: Tom Lendacky <thomas.lendacky@amd.com> > Acked-by: Rijo Thomas <Rijo-john.Thomas@amd.com> >> --- >> drivers/crypto/ccp/sp-pci.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c >> index b5970ae54d0e..792d6da7f0c0 100644 >> --- a/drivers/crypto/ccp/sp-pci.c >> +++ b/drivers/crypto/ccp/sp-pci.c >> @@ -427,6 +427,12 @@ static const struct sp_dev_vdata dev_vdata[] = { >> .bar = 2, >> #ifdef CONFIG_CRYPTO_DEV_SP_PSP >> .psp_vdata = &pspv2, >> +#endif >> + }, >> + { /* 6 */ >> + .bar = 2, >> +#ifdef CONFIG_CRYPTO_DEV_SP_PSP >> + .psp_vdata = &pspv3, >> #endif >> }, >> }; >> @@ -438,6 +444,7 @@ static const struct pci_device_id sp_pci_table[] = { >> { PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] }, >> { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] }, >> { PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] }, >> + { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] }, >> /* Last entry must be zero */ >> { 0, } >> };
On Tue, Jul 19, 2022 at 11:13:28AM -0500, Mario Limonciello wrote: > Add a new CCP/PSP PCI device ID. This uses same register offsets > as the previously supported structure. > > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> > --- > drivers/crypto/ccp/sp-pci.c | 7 +++++++ > 1 file changed, 7 insertions(+) Patch applied. Thanks.
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index b5970ae54d0e..792d6da7f0c0 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -427,6 +427,12 @@ static const struct sp_dev_vdata dev_vdata[] = { .bar = 2, #ifdef CONFIG_CRYPTO_DEV_SP_PSP .psp_vdata = &pspv2, +#endif + }, + { /* 6 */ + .bar = 2, +#ifdef CONFIG_CRYPTO_DEV_SP_PSP + .psp_vdata = &pspv3, #endif }, }; @@ -438,6 +444,7 @@ static const struct pci_device_id sp_pci_table[] = { { PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] }, { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] }, { PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] }, + { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] }, /* Last entry must be zero */ { 0, } };
Add a new CCP/PSP PCI device ID. This uses same register offsets as the previously supported structure. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- drivers/crypto/ccp/sp-pci.c | 7 +++++++ 1 file changed, 7 insertions(+)