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[1/2] dt-bindings: pinctrl: mt8186: Add gpio-line-names property

Message ID 20220725100253.10687-2-allen-kh.cheng@mediatek.com (mailing list archive)
State New, archived
Headers show
Series MT8186 pinctrl properties adjustments | expand

Commit Message

Allen-KH Cheng July 25, 2022, 10:02 a.m. UTC
Add the 'gpio-line-names' property to mt8186-pinctrl, as this will be
used in devicetrees to describe pin names.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml | 2 ++
 1 file changed, 2 insertions(+)

Comments

AngeloGioacchino Del Regno July 25, 2022, 10:35 a.m. UTC | #1
Il 25/07/22 12:02, Allen-KH Cheng ha scritto:
> Add the 'gpio-line-names' property to mt8186-pinctrl, as this will be
> used in devicetrees to describe pin names.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

> ---
>   Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> index 8a2bb8608291..6784885edc5c 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> @@ -28,6 +28,8 @@ properties:
>     gpio-ranges:
>       maxItems: 1
>   
> +  gpio-line-names: true
> +
>     reg:
>       description: |
>         Physical address base for gpio base registers. There are 8 different GPIO
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
index 8a2bb8608291..6784885edc5c 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
@@ -28,6 +28,8 @@  properties:
   gpio-ranges:
     maxItems: 1
 
+  gpio-line-names: true
+
   reg:
     description: |
       Physical address base for gpio base registers. There are 8 different GPIO