Message ID | d1a1da631b44f425d929767fda74c90de2d87a8d.1651774250.git.isaku.yamahata@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM TDX basic feature support | expand |
On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > From: Sean Christopherson <sean.j.christopherson@intel.com> > > Explicitly check for an MMIO spte in the fast page fault flow. TDX will > use a not-present entry for MMIO sptes, which can be mistaken for an > access-tracked spte since both have SPTE_SPECIAL_MASK set. > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so this > patch does not affect them. TDX will handle MMIO emulation through a > hypercall instead. > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > --- > arch/x86/kvm/mmu/mmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index d1c37295bb6e..4a12d862bbb6 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) > else > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); > > - if (!is_shadow_present_pte(spte)) > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) I wonder if this patch is really necessary. is_shadow_present_pte() checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? > break; > > sp = sptep_to_sp(sptep); > -- > 2.25.1 >
On Mon, Aug 01, 2022, David Matlack wrote: > On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > > From: Sean Christopherson <sean.j.christopherson@intel.com> > > > > Explicitly check for an MMIO spte in the fast page fault flow. TDX will > > use a not-present entry for MMIO sptes, which can be mistaken for an > > access-tracked spte since both have SPTE_SPECIAL_MASK set. > > > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so this > > patch does not affect them. TDX will handle MMIO emulation through a > > hypercall instead. > > > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > --- > > arch/x86/kvm/mmu/mmu.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > > index d1c37295bb6e..4a12d862bbb6 100644 > > --- a/arch/x86/kvm/mmu/mmu.c > > +++ b/arch/x86/kvm/mmu/mmu.c > > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) > > else > > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); > > > > - if (!is_shadow_present_pte(spte)) > > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) > > I wonder if this patch is really necessary. is_shadow_present_pte() > checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not > shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? This patch should be unnecessary, TDX's not-present SPTEs was one of my motivations for adding MMU_PRESENT. Bit 11 most definitely must not be set for MMIO SPTEs.
> On Mon, Aug 01, 2022, David Matlack wrote: > > On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > > > From: Sean Christopherson <sean.j.christopherson@intel.com> > > > > > > Explicitly check for an MMIO spte in the fast page fault flow. TDX > > > will use a not-present entry for MMIO sptes, which can be mistaken > > > for an access-tracked spte since both have SPTE_SPECIAL_MASK set. > > > > > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so > > > this patch does not affect them. TDX will handle MMIO emulation > > > through a hypercall instead. > > > > > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > > --- > > > arch/x86/kvm/mmu/mmu.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index > > > d1c37295bb6e..4a12d862bbb6 100644 > > > --- a/arch/x86/kvm/mmu/mmu.c > > > +++ b/arch/x86/kvm/mmu/mmu.c > > > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, > struct kvm_page_fault *fault) > > > else > > > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, > &spte); > > > > > > - if (!is_shadow_present_pte(spte)) > > > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) > > > > I wonder if this patch is really necessary. is_shadow_present_pte() > > checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not > > shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? > > This patch should be unnecessary, TDX's not-present SPTEs was one of my > motivations > for adding MMU_PRESENT. Bit 11 most definitely must not be set for MMIO > SPTEs. As we already discussed, Isaku will drop this patch.
On Mon, Aug 1, 2022 at 6:46 PM Huang, Kai <kai.huang@intel.com> wrote: > > > On Mon, Aug 01, 2022, David Matlack wrote: > > > On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > > > > From: Sean Christopherson <sean.j.christopherson@intel.com> > > > > > > > > Explicitly check for an MMIO spte in the fast page fault flow. TDX > > > > will use a not-present entry for MMIO sptes, which can be mistaken > > > > for an access-tracked spte since both have SPTE_SPECIAL_MASK set. > > > > > > > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so > > > > this patch does not affect them. TDX will handle MMIO emulation > > > > through a hypercall instead. > > > > > > > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > > > --- > > > > arch/x86/kvm/mmu/mmu.c | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index > > > > d1c37295bb6e..4a12d862bbb6 100644 > > > > --- a/arch/x86/kvm/mmu/mmu.c > > > > +++ b/arch/x86/kvm/mmu/mmu.c > > > > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, > > struct kvm_page_fault *fault) > > > > else > > > > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, > > &spte); > > > > > > > > - if (!is_shadow_present_pte(spte)) > > > > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) > > > > > > I wonder if this patch is really necessary. is_shadow_present_pte() > > > checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not > > > shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? > > > > This patch should be unnecessary, TDX's not-present SPTEs was one of my > > motivations > > for adding MMU_PRESENT. Bit 11 most definitely must not be set for MMIO > > SPTEs. > > As we already discussed, Isaku will drop this patch. Ah, I missed that discussion. Can you share a link so I can catch up?
On Tue, 2022-08-02 at 09:34 -0700, David Matlack wrote: > On Mon, Aug 1, 2022 at 6:46 PM Huang, Kai <kai.huang@intel.com> wrote: > > > > > On Mon, Aug 01, 2022, David Matlack wrote: > > > > On Thu, May 05, 2022 at 11:14:30AM -0700, isaku.yamahata@intel.com wrote: > > > > > From: Sean Christopherson <sean.j.christopherson@intel.com> > > > > > > > > > > Explicitly check for an MMIO spte in the fast page fault flow. TDX > > > > > will use a not-present entry for MMIO sptes, which can be mistaken > > > > > for an access-tracked spte since both have SPTE_SPECIAL_MASK set. > > > > > > > > > > MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so > > > > > this patch does not affect them. TDX will handle MMIO emulation > > > > > through a hypercall instead. > > > > > > > > > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > > > > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > > > > > --- > > > > > arch/x86/kvm/mmu/mmu.c | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index > > > > > d1c37295bb6e..4a12d862bbb6 100644 > > > > > --- a/arch/x86/kvm/mmu/mmu.c > > > > > +++ b/arch/x86/kvm/mmu/mmu.c > > > > > @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, > > > struct kvm_page_fault *fault) > > > > > else > > > > > sptep = fast_pf_get_last_sptep(vcpu, fault->addr, > > > &spte); > > > > > > > > > > - if (!is_shadow_present_pte(spte)) > > > > > + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) > > > > > > > > I wonder if this patch is really necessary. is_shadow_present_pte() > > > > checks if SPTE_MMU_PRESENT_MASK is set (which is bit 11, not > > > > shadow_present_mask). Do TDX VMs set bit 11 in MMIO SPTEs? > > > > > > This patch should be unnecessary, TDX's not-present SPTEs was one of my > > > motivations > > > for adding MMU_PRESENT. Bit 11 most definitely must not be set for MMIO > > > SPTEs. > > > > As we already discussed, Isaku will drop this patch. > > Ah, I missed that discussion. Can you share a link so I can catch up? Sure. Isaku has sent out v7 of this series: https://lore.kernel.org/lkml/20220727220456.GA3669189@ls.amr.corp.intel.com/T/#m8d2229ce31b9bcd084cc43e3478154f5f24d7506 For this particular patch, see here: https://lore.kernel.org/lkml/20220727220456.GA3669189@ls.amr.corp.intel.com/T/#mcdb118103460c55f8b850e784d1ed57724c0fe2f
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index d1c37295bb6e..4a12d862bbb6 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -3184,7 +3184,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) else sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); - if (!is_shadow_present_pte(spte)) + if (!is_shadow_present_pte(spte) || is_mmio_spte(spte)) break; sp = sptep_to_sp(sptep);