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[1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM

Message ID 20220816073203.27314-2-sai.krishna.potthuri@amd.com (mailing list archive)
State New, archived
Headers show
Series edac: Add support for Xilinx ZynqMP OCM EDAC | expand

Commit Message

Potthuri, Sai Krishna Aug. 16, 2022, 7:32 a.m. UTC 
From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Add bindings for Xilinx ZynqMP OCM controller.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
---
 .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml

Comments

Krzysztof Kozlowski Aug. 16, 2022, 7:59 a.m. UTC | #1 
On 16/08/2022 10:32, Sai Krishna Potthuri wrote:
> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> 
> Add bindings for Xilinx ZynqMP OCM controller.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> ---
>  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> new file mode 100644
> index 000000000000..9bcecaccade2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Zynqmp OCM EDAC driver

s/EDAC driver//
Is it a memory controller?

> +
> +maintainers:
> +  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> +  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> +
> +description: |
> +  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single bit errors

The same. Describe the hardware, not the Linux driver or its subsystem.

> +  that are corrected and double bit ecc errors that are detected by the OCM

s/ecc/ECC/

> +  ECC controller.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-ocmc-1.0
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    memory-controller@ff960000 {
> +      compatible = "xlnx,zynqmp-ocmc-1.0";
> +      reg = <0xff960000 0x1000>;
> +      interrupts = <0 10 4>;

Isn't the interrupt using common flags? If so, use proper defines.

> +    };


Best regards,
Krzysztof
Potthuri, Sai Krishna Aug. 16, 2022, 12:43 p.m. UTC | #2 
Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, August 16, 2022 1:29 PM
> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Michal Simek
> <michal.simek@xilinx.com>; Borislav Petkov <bp@alien8.de>; Mauro
> Carvalho Chehab <mchehab@kernel.org>; Tony Luck <tony.luck@intel.com>;
> James Morse <james.morse@arm.com>; Robert Richter <rric@kernel.org>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; linux-edac@vger.kernel.org;
> saikrishna12468@gmail.com; git (AMD-Xilinx) <git@amd.com>; Shubhrajyoti
> Datta <shubhrajyoti.datta@xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP
> OCM
> 
> On 16/08/2022 10:32, Sai Krishna Potthuri wrote:
> > From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> >
> > Add bindings for Xilinx ZynqMP OCM controller.
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > ---
> >  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > new file mode 100644
> > index 000000000000..9bcecaccade2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > @@ -0,0 +1,41 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx Zynqmp OCM EDAC driver
> 
> s/EDAC driver//
> Is it a memory controller?
This driver is about Error Detection and Correction feature for OCM (On Chip
Memory) controller which supports ECC functionality.
> 
> > +
> > +maintainers:
> > +  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> > +  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > +
> > +description: |
> > +  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single
> > +bit errors
> 
> The same. Describe the hardware, not the Linux driver or its subsystem.
I will fix in v2.
> 
> > +  that are corrected and double bit ecc errors that are detected by
> > + the OCM
> 
> s/ecc/ECC/
I will fix in v2.
> 
> > +  ECC controller.
> > +
> > +properties:
> > +  compatible:
> > +    const: xlnx,zynqmp-ocmc-1.0
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +  - |
> > +    memory-controller@ff960000 {
> > +      compatible = "xlnx,zynqmp-ocmc-1.0";
> > +      reg = <0xff960000 0x1000>;
> > +      interrupts = <0 10 4>;
> 
> Isn't the interrupt using common flags? If so, use proper defines.
I will fix in v2.

Regards
Sai Krishna
> 
> > +    };
> 
> 
> Best regards,
> Krzysztof
Krzysztof Kozlowski Aug. 16, 2022, 1:23 p.m. UTC | #3 
On 16/08/2022 15:43, Potthuri, Sai Krishna wrote:
> Hi Krzysztof,
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Sent: Tuesday, August 16, 2022 1:29 PM
>> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Rob Herring
>> <robh+dt@kernel.org>; Krzysztof Kozlowski
>> <krzysztof.kozlowski+dt@linaro.org>; Michal Simek
>> <michal.simek@xilinx.com>; Borislav Petkov <bp@alien8.de>; Mauro
>> Carvalho Chehab <mchehab@kernel.org>; Tony Luck <tony.luck@intel.com>;
>> James Morse <james.morse@arm.com>; Robert Richter <rric@kernel.org>
>> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
>> kernel@vger.kernel.org; linux-edac@vger.kernel.org;
>> saikrishna12468@gmail.com; git (AMD-Xilinx) <git@amd.com>; Shubhrajyoti
>> Datta <shubhrajyoti.datta@xilinx.com>
>> Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP
>> OCM
>>
>> On 16/08/2022 10:32, Sai Krishna Potthuri wrote:
>>> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>>>
>>> Add bindings for Xilinx ZynqMP OCM controller.
>>>
>>> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>>> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
>>> ---
>>>  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
>>>  1 file changed, 41 insertions(+)
>>>  create mode 100644
>>> Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
>>> b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
>>> new file mode 100644
>>> index 000000000000..9bcecaccade2
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
>>> @@ -0,0 +1,41 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Xilinx Zynqmp OCM EDAC driver
>>
>> s/EDAC driver//
>> Is it a memory controller?
> This driver is about Error Detection and Correction feature for OCM (On Chip
> Memory) controller which supports ECC functionality.

I am not talking about driver. What is the hardware exactly? On Chip
Memory Controller sounds like Memory Controller, so use this instead of
EDAC.


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
new file mode 100644
index 000000000000..9bcecaccade2
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
@@ -0,0 +1,41 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Zynqmp OCM EDAC driver
+
+maintainers:
+  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
+  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
+
+description: |
+  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single bit errors
+  that are corrected and double bit ecc errors that are detected by the OCM
+  ECC controller.
+
+properties:
+  compatible:
+    const: xlnx,zynqmp-ocmc-1.0
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    memory-controller@ff960000 {
+      compatible = "xlnx,zynqmp-ocmc-1.0";
+      reg = <0xff960000 0x1000>;
+      interrupts = <0 10 4>;
+    };