| Message ID | 20220812074257.58254-3-samuel@sholland.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/sun4i: dsi: Support the A100/D1 controller variant | expand |
On 12/08/2022 10:42, Samuel Holland wrote: > The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the > same register layout as previous SoC integrations. However, its module > clock now comes from the TCON, which means it no longer runs at a fixed > rate, so this needs to be distinguished in the driver. > > The controller also now uses pins on Port D instead of dedicated pins, > so it drops the separate power domain. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > Removal of the vcc-dsi-supply is maybe a bit questionable. Since there > is no "VCC-DSI" pin anymore, it's not obvious which pin actually does > power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO > or VCC-LVDS. So far, all boards have all of these as always-on supplies, > so it is hard to test. > > .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++---- > 1 file changed, 23 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml > index ae55ef3fb1fe..c53c25b87bd4 100644 > --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml > +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml > @@ -12,9 +12,14 @@ maintainers: > > properties: > compatible: > - enum: > - - allwinner,sun6i-a31-mipi-dsi > - - allwinner,sun50i-a64-mipi-dsi > + oneOf: > + - enum: > + - allwinner,sun6i-a31-mipi-dsi > + - allwinner,sun50i-a64-mipi-dsi > + - allwinner,sun50i-a100-mipi-dsi While you are moving code, how about bringing alphabetical order? > + - items: > + - const: allwinner,sun20i-d1-mipi-dsi > + - const: allwinner,sun50i-a100-mipi-dsi > > reg: > maxItems: 1 > @@ -59,7 +64,6 @@ required: > - phys > - phy-names > - resets > - - vcc-dsi-supply > - port > > allOf: > @@ -68,7 +72,9 @@ allOf: > properties: > compatible: > contains: > - const: allwinner,sun6i-a31-mipi-dsi > + enum: > + - allwinner,sun6i-a31-mipi-dsi > + - allwinner,sun50i-a100-mipi-dsi Here as well > > then: > properties: > @@ -83,6 +89,18 @@ allOf: > clocks: > maxItems: 1 > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - allwinner,sun6i-a31-mipi-dsi > + - allwinner,sun50i-a64-mipi-dsi and here Best regards, Krzysztof
Hi Krzysztof, On 8/12/22 5:49 AM, Krzysztof Kozlowski wrote: > On 12/08/2022 10:42, Samuel Holland wrote: >> The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the >> same register layout as previous SoC integrations. However, its module >> clock now comes from the TCON, which means it no longer runs at a fixed >> rate, so this needs to be distinguished in the driver. >> >> The controller also now uses pins on Port D instead of dedicated pins, >> so it drops the separate power domain. >> >> Signed-off-by: Samuel Holland <samuel@sholland.org> >> --- >> Removal of the vcc-dsi-supply is maybe a bit questionable. Since there >> is no "VCC-DSI" pin anymore, it's not obvious which pin actually does >> power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO >> or VCC-LVDS. So far, all boards have all of these as always-on supplies, >> so it is hard to test. >> >> .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++---- >> 1 file changed, 23 insertions(+), 5 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >> index ae55ef3fb1fe..c53c25b87bd4 100644 >> --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >> +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >> @@ -12,9 +12,14 @@ maintainers: >> >> properties: >> compatible: >> - enum: >> - - allwinner,sun6i-a31-mipi-dsi >> - - allwinner,sun50i-a64-mipi-dsi >> + oneOf: >> + - enum: >> + - allwinner,sun6i-a31-mipi-dsi >> + - allwinner,sun50i-a64-mipi-dsi >> + - allwinner,sun50i-a100-mipi-dsi > > While you are moving code, how about bringing alphabetical order? I have put the sun*i prefix in numeric order, which matches (almost) all of our other bindings. It roughly corresponds to chronological order as well. It doesn't make much sense to me to sort sun50i (ARM64 SoCs) between sun5i and sun6i (early ARMv7 SoCs). Regards, Samuel
On 13/08/2022 01:58, Samuel Holland wrote: > Hi Krzysztof, > > On 8/12/22 5:49 AM, Krzysztof Kozlowski wrote: >> On 12/08/2022 10:42, Samuel Holland wrote: >>> The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the >>> same register layout as previous SoC integrations. However, its module >>> clock now comes from the TCON, which means it no longer runs at a fixed >>> rate, so this needs to be distinguished in the driver. >>> >>> The controller also now uses pins on Port D instead of dedicated pins, >>> so it drops the separate power domain. >>> >>> Signed-off-by: Samuel Holland <samuel@sholland.org> >>> --- >>> Removal of the vcc-dsi-supply is maybe a bit questionable. Since there >>> is no "VCC-DSI" pin anymore, it's not obvious which pin actually does >>> power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO >>> or VCC-LVDS. So far, all boards have all of these as always-on supplies, >>> so it is hard to test. >>> >>> .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++---- >>> 1 file changed, 23 insertions(+), 5 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >>> index ae55ef3fb1fe..c53c25b87bd4 100644 >>> --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >>> +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml >>> @@ -12,9 +12,14 @@ maintainers: >>> >>> properties: >>> compatible: >>> - enum: >>> - - allwinner,sun6i-a31-mipi-dsi >>> - - allwinner,sun50i-a64-mipi-dsi >>> + oneOf: >>> + - enum: >>> + - allwinner,sun6i-a31-mipi-dsi >>> + - allwinner,sun50i-a64-mipi-dsi >>> + - allwinner,sun50i-a100-mipi-dsi >> >> While you are moving code, how about bringing alphabetical order? > > I have put the sun*i prefix in numeric order, which matches (almost) all of our 5 is before 6, so strictly numerical order would be: allwinner,sun50i-a64-mipi-dsi allwinner,sun50i-a100-mipi-dsi allwinner,sun6i-a31-mipi-dsi > other bindings. It roughly corresponds to chronological order as well. It > doesn't make much sense to me to sort sun50i (ARM64 SoCs) between sun5i and > sun6i (early ARMv7 SoCs). However if you say you already implemented some order (obvious for Allwinner folks), then of course it is fine with me. I just hope other people will get figure out this order, so they can maintain it. So assuming there is some order: Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index ae55ef3fb1fe..c53c25b87bd4 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -12,9 +12,14 @@ maintainers: properties: compatible: - enum: - - allwinner,sun6i-a31-mipi-dsi - - allwinner,sun50i-a64-mipi-dsi + oneOf: + - enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a64-mipi-dsi + - allwinner,sun50i-a100-mipi-dsi + - items: + - const: allwinner,sun20i-d1-mipi-dsi + - const: allwinner,sun50i-a100-mipi-dsi reg: maxItems: 1 @@ -59,7 +64,6 @@ required: - phys - phy-names - resets - - vcc-dsi-supply - port allOf: @@ -68,7 +72,9 @@ allOf: properties: compatible: contains: - const: allwinner,sun6i-a31-mipi-dsi + enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a100-mipi-dsi then: properties: @@ -83,6 +89,18 @@ allOf: clocks: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun6i-a31-mipi-dsi + - allwinner,sun50i-a64-mipi-dsi + + then: + required: + - vcc-dsi-supply + unevaluatedProperties: false examples:
The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the same register layout as previous SoC integrations. However, its module clock now comes from the TCON, which means it no longer runs at a fixed rate, so this needs to be distinguished in the driver. The controller also now uses pins on Port D instead of dedicated pins, so it drops the separate power domain. Signed-off-by: Samuel Holland <samuel@sholland.org> --- Removal of the vcc-dsi-supply is maybe a bit questionable. Since there is no "VCC-DSI" pin anymore, it's not obvious which pin actually does power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO or VCC-LVDS. So far, all boards have all of these as always-on supplies, so it is hard to test. .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++---- 1 file changed, 23 insertions(+), 5 deletions(-)