| Message ID | 1341243574-3258-3-git-send-email-thomas.petazzoni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
> +++ b/arch/arm/mach-mvebu/include/mach/uncompress.h > @@ -0,0 +1,43 @@ > +/* > + * Marvell Armada SoC kernel uncompression UART routines > + * > + * Copyright (C) 2012 Marvell > + * > + * Lior Amsalem <alior@marvell.com> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + */ > + > +#include <mach/armada-370-xp.h> > + > +#define UART_THR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ > + + 0x12000)) > +#define UART_LSR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ > + + 0x12014)) > + Hi Thomas What physical address does this come out to? All Orion platforms have the serial port at the same place, 0xf1012000. If 370/XP is the same, i suggest dropping this #include, hard code the address, and we share the implementation for all SoCs. If however, the ASIC engineers have decided to move it, we need some extra logic to handle different base addresses for Dove and 370/XP which should be supportable in one kernel binary. Andrew
Hello Andrew, Le Mon, 2 Jul 2012 20:33:30 +0200, Andrew Lunn <andrew@lunn.ch> a écrit : > What physical address does this come out to? All Orion platforms have > the serial port at the same place, 0xf1012000. If 370/XP is the same, > i suggest dropping this #include, hard code the address, and we share > the implementation for all SoCs. > > If however, the ASIC engineers have decided to move it, we need some > extra logic to handle different base addresses for Dove and 370/XP > which should be supportable in one kernel binary. As per armada-370-xp.h: #define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 The physical address of the internal registers is 0xd0000000. It does not seem to be configurable using the address decoding mechanism. OMAP has some logic to handle this kind of problems, see plat-omap/include/plat/uncompress.h. We can quite certainly overcome this problem somehow. Best regards, Thomas
> OMAP has some logic to handle this kind of problems, see > plat-omap/include/plat/uncompress.h. We can quite certainly overcome > this problem somehow. That file says: * Initialize the port based on the machine ID from the bootloader. Which when using DT we don't have. As you said, we can overcome this somehow. We just need to be aware there will be changes here. It would also be nice if Marvell ASIC engineers didn't randomly move things around in the address space.... Andrew
On Monday 02 July 2012, Andrew Lunn wrote: > > OMAP has some logic to handle this kind of problems, see > > plat-omap/include/plat/uncompress.h. We can quite certainly overcome > > this problem somehow. > > That file says: > > * Initialize the port based on the machine ID from the bootloader. > > Which when using DT we don't have. > > As you said, we can overcome this somehow. We just need to be aware > there will be changes here. > > It would also be nice if Marvell ASIC engineers didn't randomly move > things around in the address space.... For now, I'd suggest you don't try too hard to make this work for the a combination of the mvebu platforms. There has been some discussion about a solution that will work across multiple platform directories. While that might take a little longer, I assume that we will find some way to do it, so let's first unify all the other header files within mvebu. Arnd
On Mon, 2 Jul 2012, Andrew Lunn wrote: > It would also be nice if Marvell ASIC engineers didn't randomly move > things around in the address space.... They didn't. The _software_ engineers did. As you might know, the Orion and Kirkwood SOCs have programmable physical windows for most things, including PCI IO window, PCI mem window, SDRAM window, NAND controller window, bridge peripheral window, etc. So you can change your physical address space as you wish. This was made to accommodate whether you are a PCI host or a PCI client (think wifi cards which are in the later category but still with this window control block). This is also how the various SDRAM banks are remapped to appear as a contiguous chunk of physical memory regardless of the populated memory size in each bank. Most of this is being partly set up (or set again) in the various addr-map.c files. Now it seems that all the u-Boot implementations for Orion/Kirkwood out there have always moved the window containing the serial ports from its default 0xd0000000 address to 0xf1000000. Why they did that I have no idea. And Linux simply took those remapped physical addresses as authoritative. And whether or not Armada 370/XP still have this physical remap ability I don't know. And if it does, then why didn't it follow the same 0xf1000000 tradition as all the other mvebu targets before them I don't know either. Maybe this could be considered? Nicolas
On Mon, Jul 02, 2012 at 11:48:42PM -0400, Nicolas Pitre wrote: > On Mon, 2 Jul 2012, Andrew Lunn wrote: > > > It would also be nice if Marvell ASIC engineers didn't randomly move > > things around in the address space.... > > They didn't. The _software_ engineers did. Ah, interesting. I never got that deep into the address mapping, i just mechanically refactered it across all Orions without take too much time to really understand what its doing. > Now it seems that all the u-Boot implementations for Orion/Kirkwood out > there have always moved the window containing the serial ports from its > default 0xd0000000 address to 0xf1000000. Why they did that I have no > idea. And Linux simply took those remapped physical addresses as > authoritative. > > And whether or not Armada 370/XP still have this physical remap ability > I don't know. And if it does, then why didn't it follow the same > 0xf1000000 tradition as all the other mvebu targets before them I don't > know either. Maybe this could be considered? Thomas, Gregory, could you look at this? Are the uboot source open, or are you using a proprietary Marvell version? When Arnd first proposed moving everything into one directory, i had a quick look at the memory map. The Orions have more than just the serial ports at the same address. If i remember correctly, I2C, SPI, PCIE0, USB0, XOR, and ETH0 are all at the same physical address. Unfortunately, they have different virtual addresses. So I played around unifying the virtual address map. Doing this will allow some code simplification, header file simplification, and sharing of some .dtsi and DT across all Orion systems. Its not something i want to do right now, but having 370/XP the same as Orion would be a step towards this. Andrew
Hello, Le Tue, 3 Jul 2012 09:09:27 +0200, Andrew Lunn <andrew@lunn.ch> a écrit : > > Now it seems that all the u-Boot implementations for Orion/Kirkwood out > > there have always moved the window containing the serial ports from its > > default 0xd0000000 address to 0xf1000000. Why they did that I have no > > idea. And Linux simply took those remapped physical addresses as > > authoritative. > > > > And whether or not Armada 370/XP still have this physical remap ability > > I don't know. And if it does, then why didn't it follow the same > > 0xf1000000 tradition as all the other mvebu targets before them I don't > > know either. Maybe this could be considered? > > Thomas, Gregory, could you look at this? Yes, we will look into this with Marvell engineers. > Are the uboot source open, or are you using a proprietary Marvell > version? As far as I know, there is no support in upstream U-Boot for Armada 370 and XP. We're currently using the internal Marvell U-Boot. > When Arnd first proposed moving everything into one directory, i had a > quick look at the memory map. The Orions have more than just the > serial ports at the same address. If i remember correctly, I2C, SPI, > PCIE0, USB0, XOR, and ETH0 are all at the same physical > address. Unfortunately, they have different virtual addresses. So I > played around unifying the virtual address map. > > Doing this will allow some code simplification, header file > simplification, and sharing of some .dtsi and DT across all Orion > systems. > > Its not something i want to do right now, but having 370/XP the same > as Orion would be a step towards this. That sounds like a good idea of course, if possible. Best regards, Thomas
On Mon, Jul 02, 2012 at 05:39:27PM +0200, Thomas Petazzoni wrote: > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> > Signed-off-by: Lior Amsalem <alior@marvell.com> > --- > arch/arm/mach-mvebu/include/mach/debug-macro.S | 24 +++++++++++++ > arch/arm/mach-mvebu/include/mach/timex.h | 13 +++++++ > arch/arm/mach-mvebu/include/mach/uncompress.h | 43 ++++++++++++++++++++++++ > 3 files changed, 80 insertions(+) > create mode 100644 arch/arm/mach-mvebu/include/mach/debug-macro.S > create mode 100644 arch/arm/mach-mvebu/include/mach/timex.h > create mode 100644 arch/arm/mach-mvebu/include/mach/uncompress.h > > diff --git a/arch/arm/mach-mvebu/include/mach/debug-macro.S b/arch/arm/mach-mvebu/include/mach/debug-macro.S > new file mode 100644 > index 0000000..2282576 > --- /dev/null > +++ b/arch/arm/mach-mvebu/include/mach/debug-macro.S > @@ -0,0 +1,24 @@ > +/* > + * Early serial output macro for Marvell SoC > + * > + * Copyright (C) 2012 Marvell > + * > + * Lior Amsalem <alior@marvell.com> > + * Gregory Clement <gregory.clement@free-electrons.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#include <mach/armada-370-xp.h> > + > + .macro addruart, rp, rv, tmp > + ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE > + ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE > + orr \rp, \rp, #0x00012000 > + orr \rv, \rv, #0x00012000 > + .endm > + > +#define UART_SHIFT 2 > +#include <asm/hardware/debug-8250.S> > diff --git a/arch/arm/mach-mvebu/include/mach/timex.h b/arch/arm/mach-mvebu/include/mach/timex.h > new file mode 100644 > index 0000000..ab324a3 > --- /dev/null > +++ b/arch/arm/mach-mvebu/include/mach/timex.h > @@ -0,0 +1,13 @@ > +/* > + * Marvell Armada SoC time definitions > + * > + * Copyright (C) 2012 Marvell > + * > + * Lior Amsalem <alior@marvell.com> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + */ > + > +#define CLOCK_TICK_RATE (100 * HZ) > diff --git a/arch/arm/mach-mvebu/include/mach/uncompress.h b/arch/arm/mach-mvebu/include/mach/uncompress.h > new file mode 100644 > index 0000000..d6a100c > --- /dev/null > +++ b/arch/arm/mach-mvebu/include/mach/uncompress.h > @@ -0,0 +1,43 @@ > +/* > + * Marvell Armada SoC kernel uncompression UART routines > + * > + * Copyright (C) 2012 Marvell > + * > + * Lior Amsalem <alior@marvell.com> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + */ > + > +#include <mach/armada-370-xp.h> > + > +#define UART_THR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ > + + 0x12000)) > +#define UART_LSR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ > + + 0x12014)) > + > +#define LSR_THRE 0x20 > + > +static void putc(const char c) > +{ > + int i; > + > + for (i = 0; i < 0x1000; i++) { > + /* Transmit fifo not full? */ > + if (*UART_LSR & LSR_THRE) > + break; > + } > + > + *UART_THR = c; > +} > + > +static void flush(void) > +{ > +} > + > +/* > + * nothing to do > + */ > +#define arch_decomp_setup() > +#define arch_decomp_wdog() > -- > 1.7.9.5 > Acked-by: Andrew Lunn <andrew@lunn.ch>
diff --git a/arch/arm/mach-mvebu/include/mach/debug-macro.S b/arch/arm/mach-mvebu/include/mach/debug-macro.S new file mode 100644 index 0000000..2282576 --- /dev/null +++ b/arch/arm/mach-mvebu/include/mach/debug-macro.S @@ -0,0 +1,24 @@ +/* + * Early serial output macro for Marvell SoC + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <alior@marvell.com> + * Gregory Clement <gregory.clement@free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <mach/armada-370-xp.h> + + .macro addruart, rp, rv, tmp + ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE + ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-mvebu/include/mach/timex.h b/arch/arm/mach-mvebu/include/mach/timex.h new file mode 100644 index 0000000..ab324a3 --- /dev/null +++ b/arch/arm/mach-mvebu/include/mach/timex.h @@ -0,0 +1,13 @@ +/* + * Marvell Armada SoC time definitions + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <alior@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-mvebu/include/mach/uncompress.h b/arch/arm/mach-mvebu/include/mach/uncompress.h new file mode 100644 index 0000000..d6a100c --- /dev/null +++ b/arch/arm/mach-mvebu/include/mach/uncompress.h @@ -0,0 +1,43 @@ +/* + * Marvell Armada SoC kernel uncompression UART routines + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <alior@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <mach/armada-370-xp.h> + +#define UART_THR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ + + 0x12000)) +#define UART_LSR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ + + 0x12014)) + +#define LSR_THRE 0x20 + +static void putc(const char c) +{ + int i; + + for (i = 0; i < 0x1000; i++) { + /* Transmit fifo not full? */ + if (*UART_LSR & LSR_THRE) + break; + } + + *UART_THR = c; +} + +static void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog()