Message ID | 20220818124132.125304-11-jagan@edgeble.ai (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | None | expand |
Quoting Jagan Teki (2022-08-18 05:41:23) > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: xin24m > + > + rockchip,grf: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to the syscon managing the "general register files" (GRF), > + if missing pll rates are not changeable, due to the missing pll > + lock status. > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - "#reset-cells" Why aren't clocks required? > + > +additionalProperties: false > + > +examples: > + - | > + cru: clock-controller@ff490000 { > + compatible = "rockchip,rv1126-cru"; > + reg = <0xff490000 0x1000>; > + rockchip,grf = <&grf>; > + #clock-cells = <1>; > + #reset-cells = <1>; Can you add 'clocks' property to the binding?
On Fri, 19 Aug 2022 at 02:59, Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Jagan Teki (2022-08-18 05:41:23) > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + const: xin24m > > + > > + rockchip,grf: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + Phandle to the syscon managing the "general register files" (GRF), > > + if missing pll rates are not changeable, due to the missing pll > > + lock status. > > + > > +required: > > + - compatible > > + - reg > > + - "#clock-cells" > > + - "#reset-cells" > > Why aren't clocks required? I don't see any clocks being used by cru in rv1126 [1] so that is the reason I didn't add any. Let me know if it is something that is mandatory to add even if it's unused. [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/arch/arm/boot/dts/rv1126.dtsi#L1074 Thanks, Jagan.
Am Freitag, 19. August 2022, 23:20:03 CEST schrieb Jagan Teki: > On Fri, 19 Aug 2022 at 02:59, Stephen Boyd <sboyd@kernel.org> wrote: > > > > Quoting Jagan Teki (2022-08-18 05:41:23) > > > + > > > + clocks: > > > + maxItems: 1 > > > + > > > + clock-names: > > > + const: xin24m > > > + > > > + rockchip,grf: > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > + description: > > > + Phandle to the syscon managing the "general register files" (GRF), > > > + if missing pll rates are not changeable, due to the missing pll > > > + lock status. > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - "#clock-cells" > > > + - "#reset-cells" > > > > Why aren't clocks required? > > I don't see any clocks being used by cru in rv1126 [1] so that is the > reason I didn't add any. Let me know if it is something that is > mandatory to add even if it's unused. > [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/arch/arm/boot/dts/rv1126.dtsi#L1074 Our clock drivers normally just expect that xin24m to be present but that xin24m _is_ a clock dependency for the cru and for a lot of Rockchip SoCs Johan did update both the binding and the dtsi-s to make that explicit when converting the binding over to yaml See for example the rk3399. Heiko
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml new file mode 100644 index 000000000000..0998f8b922bd --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RV1126 Clock and Reset Unit + +maintainers: + - Jagan Teki <jagan@edgeble.ai> + - Finley Xiao <finley.xiao@rock-chips.com> + - Heiko Stuebner <heiko@sntech.de> + +description: + The RV1126 clock controller generates the clock and also implements a + reset controller for SoC peripherals. + +properties: + compatible: + enum: + - rockchip,rv1126-cru + - rockchip,rv1126-pmucru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: xin24m + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff490000 { + compatible = "rockchip,rv1126-cru"; + reg = <0xff490000 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + };