| Message ID | 20220820082936.686924-2-dario.binacchi@amarulasolutions.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | can: bxcan: add support for ST bxCAN controller | expand |
On 20/08/2022 11:29, Dario Binacchi wrote: > Add documentation of device tree bindings for the STM32 basic extended > CAN (bxcan) controller. > > Signed-off-by: Dario Binacchi <dariobin@libero.it> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > --- > > Changes in v2: > - Change the file name into 'st,stm32-bxcan-core.yaml'. > - Rename compatibles: > - st,stm32-bxcan-core -> st,stm32f4-bxcan-core > - st,stm32-bxcan -> st,stm32f4-bxcan > - Rename master property to st,can-master. > - Remove the status property from the example. > - Put the node child properties as required. > > .../bindings/net/can/st,stm32-bxcan.yaml | 136 ++++++++++++++++++ > 1 file changed, 136 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > new file mode 100644 > index 000000000000..288631b5556d > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > @@ -0,0 +1,136 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics bxCAN controller > + > +description: STMicroelectronics BxCAN controller for CAN bus > + > +maintainers: > + - Dario Binacchi <dario.binacchi@amarulasolutions.com> > + > +allOf: > + - $ref: can-controller.yaml# > + > +properties: > + compatible: > + enum: > + - st,stm32f4-bxcan-core > + > + reg: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + clocks: > + description: > + Input clock for registers access > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - resets > + - clocks > + - '#address-cells' > + - '#size-cells' > + > +patternProperties: No improvements here, so my comment stay. Please fix it. > + "^can@[0-9]+$": > + type: object > + description: > + A CAN block node contains two subnodes, representing each one a CAN > + instance available on the machine. I still do not understand why you need children. You did not CC me on driver change, so difficult to say. You did not describe the parent device - there is no description. Why do you need parent device at all? This looks like some driver-driven-bindings instead of just real hardware description. Best regards, Krzysztof
On Sat, Aug 20, 2022 at 10:29:33AM +0200, Dario Binacchi wrote: > Add documentation of device tree bindings for the STM32 basic extended > CAN (bxcan) controller. > > Signed-off-by: Dario Binacchi <dariobin@libero.it> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > --- > > Changes in v2: > - Change the file name into 'st,stm32-bxcan-core.yaml'. > - Rename compatibles: > - st,stm32-bxcan-core -> st,stm32f4-bxcan-core > - st,stm32-bxcan -> st,stm32f4-bxcan > - Rename master property to st,can-master. > - Remove the status property from the example. > - Put the node child properties as required. > > .../bindings/net/can/st,stm32-bxcan.yaml | 136 ++++++++++++++++++ > 1 file changed, 136 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > new file mode 100644 > index 000000000000..288631b5556d > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > @@ -0,0 +1,136 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics bxCAN controller > + > +description: STMicroelectronics BxCAN controller for CAN bus > + > +maintainers: > + - Dario Binacchi <dario.binacchi@amarulasolutions.com> > + > +allOf: > + - $ref: can-controller.yaml# > + > +properties: > + compatible: > + enum: > + - st,stm32f4-bxcan-core > + > + reg: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + clocks: > + description: > + Input clock for registers access > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - resets > + - clocks > + - '#address-cells' > + - '#size-cells' > + > +patternProperties: > + "^can@[0-9]+$": > + type: object > + description: > + A CAN block node contains two subnodes, representing each one a CAN > + instance available on the machine. > + > + properties: > + compatible: > + enum: > + - st,stm32f4-bxcan > + > + st,can-master: > + description: > + Master and slave mode of the bxCAN peripheral is only relevant > + if the chip has two CAN peripherals. In that case they share > + some of the required logic, and that means you cannot use the > + slave CAN without the master CAN. > + type: boolean > + > + reg: > + description: | > + Offset of CAN instance in CAN block. Valid values are: > + - 0x0: CAN1 > + - 0x400: CAN2 > + maxItems: 1 > + > + interrupts: > + items: > + - description: transmit interrupt > + - description: FIFO 0 receive interrupt > + - description: FIFO 1 receive interrupt > + - description: status change error interrupt > + > + interrupt-names: > + items: > + - const: tx > + - const: rx0 > + - const: rx1 > + - const: sce > + > + resets: > + maxItems: 1 > + > + clocks: > + description: > + Input clock for registers access > + maxItems: 1 > + > + additionalProperties: false > + > + required: > + - compatible > + - reg > + - interrupts > + - resets > + > +examples: > + - | > + #include <dt-bindings/clock/stm32fx-clock.h> > + #include <dt-bindings/mfd/stm32f4-rcc.h> > + > + can: can@40006400 { > + compatible = "st,stm32f4-bxcan-core"; > + reg = <0x40006400 0x800>; > + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; > + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; > + #address-cells = <1>; > + #size-cells = <0>; > + Missing 'ranges'. > + can1: can@0 { > + compatible = "st,stm32f4-bxcan"; > + reg = <0x0>; > + interrupts = <19>, <20>, <21>, <22>; > + interrupt-names = "tx", "rx0", "rx1", "sce"; > + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; > + st,can-master; No clocks? > + }; > + > + can2: can@400 { > + compatible = "st,stm32f4-bxcan"; > + reg = <0x400>; > + interrupts = <63>, <64>, <65>, <66>; > + interrupt-names = "tx", "rx0", "rx1", "sce"; > + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; > + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; > + }; > + }; > -- > 2.32.0 > >
Hi Krzysztof, On Tue, Aug 23, 2022 at 3:41 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 20/08/2022 11:29, Dario Binacchi wrote: > > Add documentation of device tree bindings for the STM32 basic extended > > CAN (bxcan) controller. > > > > Signed-off-by: Dario Binacchi <dariobin@libero.it> > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > > > --- > > > > Changes in v2: > > - Change the file name into 'st,stm32-bxcan-core.yaml'. > > - Rename compatibles: > > - st,stm32-bxcan-core -> st,stm32f4-bxcan-core > > - st,stm32-bxcan -> st,stm32f4-bxcan > > - Rename master property to st,can-master. > > - Remove the status property from the example. > > - Put the node child properties as required. > > > > .../bindings/net/can/st,stm32-bxcan.yaml | 136 ++++++++++++++++++ > > 1 file changed, 136 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > new file mode 100644 > > index 000000000000..288631b5556d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > @@ -0,0 +1,136 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: STMicroelectronics bxCAN controller > > + > > +description: STMicroelectronics BxCAN controller for CAN bus > > + > > +maintainers: > > + - Dario Binacchi <dario.binacchi@amarulasolutions.com> > > + > > +allOf: > > + - $ref: can-controller.yaml# > > + > > +properties: > > + compatible: > > + enum: > > + - st,stm32f4-bxcan-core > > + > > + reg: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + clocks: > > + description: > > + Input clock for registers access > > + maxItems: 1 > > + > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > +additionalProperties: false > > + > > +required: > > + - compatible > > + - reg > > + - resets > > + - clocks > > + - '#address-cells' > > + - '#size-cells' > > + > > +patternProperties: > > No improvements here, so my comment stay. Please fix it. Sorry, I'ff fix it in version 3. > > > > + "^can@[0-9]+$": > > + type: object > > + description: > > + A CAN block node contains two subnodes, representing each one a CAN > > + instance available on the machine. > > I still do not understand why you need children. You did not CC me on > driver change, so difficult to say. You did not describe the parent On the next submissions I'll send you all the series patches. > device - there is no description. Ok, I'll do it. > Why do you need parent device at all? > This looks like some driver-driven-bindings instead of just real > hardware description. The two devices are not independent. As described in the reference manual RM0386 (STM32F469xx and STM32F479xx advanced Arm®-based 32-bit MCUs) in paragraph 34.2, the bxCAN controller is a dual CAN peripheral configuration: • CAN1: Master bxCAN for managing the communication between a Slave bxCAN and the 512-byte SRAM memory • CAN2: Slave bxCAN, with no direct access to the SRAM memory. So, if I want to use CAN2 only (and not CAN1), I need to be able to use shared resources with CAN1 without having to probe the CAN1 driver. IMHO here is the justification of the parent node. Thanks and regards, Dario > > Best regards, > Krzysztof
Hi Rob, On Thu, Aug 25, 2022 at 11:12 PM Rob Herring <robh@kernel.org> wrote: > > On Sat, Aug 20, 2022 at 10:29:33AM +0200, Dario Binacchi wrote: > > Add documentation of device tree bindings for the STM32 basic extended > > CAN (bxcan) controller. > > > > Signed-off-by: Dario Binacchi <dariobin@libero.it> > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > > > --- > > > > Changes in v2: > > - Change the file name into 'st,stm32-bxcan-core.yaml'. > > - Rename compatibles: > > - st,stm32-bxcan-core -> st,stm32f4-bxcan-core > > - st,stm32-bxcan -> st,stm32f4-bxcan > > - Rename master property to st,can-master. > > - Remove the status property from the example. > > - Put the node child properties as required. > > > > .../bindings/net/can/st,stm32-bxcan.yaml | 136 ++++++++++++++++++ > > 1 file changed, 136 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > new file mode 100644 > > index 000000000000..288631b5556d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > @@ -0,0 +1,136 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: STMicroelectronics bxCAN controller > > + > > +description: STMicroelectronics BxCAN controller for CAN bus > > + > > +maintainers: > > + - Dario Binacchi <dario.binacchi@amarulasolutions.com> > > + > > +allOf: > > + - $ref: can-controller.yaml# > > + > > +properties: > > + compatible: > > + enum: > > + - st,stm32f4-bxcan-core > > + > > + reg: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + clocks: > > + description: > > + Input clock for registers access > > + maxItems: 1 > > + > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > +additionalProperties: false > > + > > +required: > > + - compatible > > + - reg > > + - resets > > + - clocks > > + - '#address-cells' > > + - '#size-cells' > > + > > +patternProperties: > > + "^can@[0-9]+$": > > + type: object > > + description: > > + A CAN block node contains two subnodes, representing each one a CAN > > + instance available on the machine. > > + > > + properties: > > + compatible: > > + enum: > > + - st,stm32f4-bxcan > > + > > + st,can-master: > > + description: > > + Master and slave mode of the bxCAN peripheral is only relevant > > + if the chip has two CAN peripherals. In that case they share > > + some of the required logic, and that means you cannot use the > > + slave CAN without the master CAN. > > + type: boolean > > + > > + reg: > > + description: | > > + Offset of CAN instance in CAN block. Valid values are: > > + - 0x0: CAN1 > > + - 0x400: CAN2 > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: transmit interrupt > > + - description: FIFO 0 receive interrupt > > + - description: FIFO 1 receive interrupt > > + - description: status change error interrupt > > + > > + interrupt-names: > > + items: > > + - const: tx > > + - const: rx0 > > + - const: rx1 > > + - const: sce > > + > > + resets: > > + maxItems: 1 > > + > > + clocks: > > + description: > > + Input clock for registers access > > + maxItems: 1 > > + > > + additionalProperties: false > > + > > + required: > > + - compatible > > + - reg > > + - interrupts > > + - resets > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/stm32fx-clock.h> > > + #include <dt-bindings/mfd/stm32f4-rcc.h> > > + > > + can: can@40006400 { > > + compatible = "st,stm32f4-bxcan-core"; > > + reg = <0x40006400 0x800>; > > + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; > > + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > Missing 'ranges'. In the file arch/arm/boot/dts/stm32f429.dtsi, I didn't find any other node using the 'ranges' property, so I didn't use it for the CAN node either. > > > + can1: can@0 { > > + compatible = "st,stm32f4-bxcan"; > > + reg = <0x0>; > > + interrupts = <19>, <20>, <21>, <22>; > > + interrupt-names = "tx", "rx0", "rx1", "sce"; > > + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; > > + st,can-master; > > No clocks? It uses the parent node clock, since it is in master mode. Thanks and regards, Dario > > > + }; > > + > > + can2: can@400 { > > + compatible = "st,stm32f4-bxcan"; > > + reg = <0x400>; > > + interrupts = <63>, <64>, <65>, <66>; > > + interrupt-names = "tx", "rx0", "rx1", "sce"; > > + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; > > + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; > > + }; > > + }; > > -- > > 2.32.0 > > > >
On Fri, Aug 26, 2022 at 2:27 AM Dario Binacchi <dario.binacchi@amarulasolutions.com> wrote: > > Hi Rob, > > On Thu, Aug 25, 2022 at 11:12 PM Rob Herring <robh@kernel.org> wrote: > > > > On Sat, Aug 20, 2022 at 10:29:33AM +0200, Dario Binacchi wrote: > > > Add documentation of device tree bindings for the STM32 basic extended > > > CAN (bxcan) controller. > > > > > > Signed-off-by: Dario Binacchi <dariobin@libero.it> > > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > > > > > > --- > > > > > > Changes in v2: > > > - Change the file name into 'st,stm32-bxcan-core.yaml'. > > > - Rename compatibles: > > > - st,stm32-bxcan-core -> st,stm32f4-bxcan-core > > > - st,stm32-bxcan -> st,stm32f4-bxcan > > > - Rename master property to st,can-master. > > > - Remove the status property from the example. > > > - Put the node child properties as required. > > > > > > .../bindings/net/can/st,stm32-bxcan.yaml | 136 ++++++++++++++++++ > > > 1 file changed, 136 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > > new file mode 100644 > > > index 000000000000..288631b5556d > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml > > > @@ -0,0 +1,136 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: STMicroelectronics bxCAN controller > > > + > > > +description: STMicroelectronics BxCAN controller for CAN bus > > > + > > > +maintainers: > > > + - Dario Binacchi <dario.binacchi@amarulasolutions.com> > > > + > > > +allOf: > > > + - $ref: can-controller.yaml# > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - st,stm32f4-bxcan-core > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + resets: > > > + maxItems: 1 > > > + > > > + clocks: > > > + description: > > > + Input clock for registers access > > > + maxItems: 1 > > > + > > > + '#address-cells': > > > + const: 1 > > > + > > > + '#size-cells': > > > + const: 0 > > > + > > > +additionalProperties: false > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - resets > > > + - clocks > > > + - '#address-cells' > > > + - '#size-cells' > > > + > > > +patternProperties: > > > + "^can@[0-9]+$": > > > + type: object > > > + description: > > > + A CAN block node contains two subnodes, representing each one a CAN > > > + instance available on the machine. > > > + > > > + properties: > > > + compatible: > > > + enum: > > > + - st,stm32f4-bxcan > > > + > > > + st,can-master: > > > + description: > > > + Master and slave mode of the bxCAN peripheral is only relevant > > > + if the chip has two CAN peripherals. In that case they share > > > + some of the required logic, and that means you cannot use the > > > + slave CAN without the master CAN. > > > + type: boolean > > > + > > > + reg: > > > + description: | > > > + Offset of CAN instance in CAN block. Valid values are: > > > + - 0x0: CAN1 > > > + - 0x400: CAN2 > > > + maxItems: 1 > > > + > > > + interrupts: > > > + items: > > > + - description: transmit interrupt > > > + - description: FIFO 0 receive interrupt > > > + - description: FIFO 1 receive interrupt > > > + - description: status change error interrupt > > > + > > > + interrupt-names: > > > + items: > > > + - const: tx > > > + - const: rx0 > > > + - const: rx1 > > > + - const: sce > > > + > > > + resets: > > > + maxItems: 1 > > > + > > > + clocks: > > > + description: > > > + Input clock for registers access > > > + maxItems: 1 > > > + > > > + additionalProperties: false > > > + > > > + required: > > > + - compatible > > > + - reg > > > + - interrupts > > > + - resets > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/clock/stm32fx-clock.h> > > > + #include <dt-bindings/mfd/stm32f4-rcc.h> > > > + > > > + can: can@40006400 { > > > + compatible = "st,stm32f4-bxcan-core"; > > > + reg = <0x40006400 0x800>; > > > + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; > > > + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > > Missing 'ranges'. > > In the file arch/arm/boot/dts/stm32f429.dtsi, I didn't find any other > node using the 'ranges' property, so > I didn't use it for the CAN node either. If the child node is a memory mapped address, then you need 'ranges'. Otherwise, things like of_iomap() don't work. Looking at the above file, only efuse@1fff7800 and adc@40012000 seem to be cases also missing 'ranges'. Rob
diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 000000000000..288631b5556d --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi <dario.binacchi@amarulasolutions.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan-core + + reg: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + description: + Input clock for registers access + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - resets + - clocks + - '#address-cells' + - '#size-cells' + +patternProperties: + "^can@[0-9]+$": + type: object + description: + A CAN block node contains two subnodes, representing each one a CAN + instance available on the machine. + + properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-master: + description: + Master and slave mode of the bxCAN peripheral is only relevant + if the chip has two CAN peripherals. In that case they share + some of the required logic, and that means you cannot use the + slave CAN without the master CAN. + type: boolean + + reg: + description: | + Offset of CAN instance in CAN block. Valid values are: + - 0x0: CAN1 + - 0x400: CAN2 + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + description: + Input clock for registers access + maxItems: 1 + + additionalProperties: false + + required: + - compatible + - reg + - interrupts + - resets + +examples: + - | + #include <dt-bindings/clock/stm32fx-clock.h> + #include <dt-bindings/mfd/stm32f4-rcc.h> + + can: can@40006400 { + compatible = "st,stm32f4-bxcan-core"; + reg = <0x40006400 0x800>; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + #address-cells = <1>; + #size-cells = <0>; + + can1: can@0 { + compatible = "st,stm32f4-bxcan"; + reg = <0x0>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + st,can-master; + }; + + can2: can@400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x400>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + }; + };