| Message ID | 20220822012449.21005-2-tom@tom-fitzhenry.me.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for the Pine64 PinePhone Pro phone | expand |
Hello Tom, On Mon, Aug 22, 2022 at 11:08:08AM +1000, Tom Fitzhenry wrote: > From: Martijn Braam <martijn@brixit.nl> > > This is a basic DT containing regulators and UART, intended to be a > base that myself and others can add additional nodes in future patches. > [...] > + > + vcc_sys: vcc-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vcc3v3_sys: vcc3v3-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_sys>; > + }; > + > + vcca1v8_s3: vcc1v8-s3-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcca1v8_s3"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc3v3_sys>; > + regulator-always-on; > + regulator-boot-on; > + }; > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + rk818: pmic@1c { > + compatible = "rockchip,rk818"; > + reg = <0x1c>; > + interrupt-parent = <&gpio1>; > + interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + clock-output-names = "xin32k", "rk808-clkout2"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>; > + rockchip,system-power-controller; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc6-supply = <&vcc_sys>; > + vcc7-supply = <&vcc3v3_sys>; > + vcc8-supply = <&vcc_sys>; > + vcc9-supply = <&vcc3v3_sys>; > + > + regulators { > + vdd_cpu_l: DCDC_REG1 { > + regulator-name = "vdd_cpu_l"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <875000>; > + regulator-max-microvolt = <975000>; > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_center: DCDC_REG2 { > + regulator-name = "vdd_center"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1350000>; Looks like a wrong top voltage. https://megous.com/dl/tmp/ad3dcc62bd00f41f.png > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v8: DCDC_REG4 { > + regulator-name = "vcc_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcca3v0_codec: LDO_REG1 { > + regulator-name = "vcca3v0_codec"; > + regulator-always-on; > + regulator-boot-on; This should not be always on, but only enabled by the codec when needed. You don't have codec described in this DT. > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc3v0_touch: LDO_REG2 { > + regulator-name = "vcc3v0_touch"; > + regulator-always-on; > + regulator-boot-on; This should not be always on. It should be enabled by touch controller, when needed. You don't have touch controller described in this DT. > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_codec: LDO_REG3 { > + regulator-name = "vcca1v8_codec"; > + regulator-always-on; > + regulator-boot-on; This should not be always on, but only enabled by the codec when needed, I suppose. Also modem codec is supplied by vcc1v8_codec which may need a gpio configured as pull-down or drive low to be properly disabled, and it is not defined in this DT. Please make sure that regulator's input doesn't float and is disabled by default. > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + rk818_pwr_on: LDO_REG4 { > + regulator-name = "rk818_pwr_on"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_3v0: LDO_REG5 { > + regulator-name = "vcc_3v0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v5: LDO_REG6 { > + regulator-name = "vcc_1v5"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc1v8_dvp: LDO_REG7 { > + regulator-name = "vcc1v8_dvp"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + vcc3v3_s3: LDO_REG8 { > + regulator-name = "vcc3v3_s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG9 { > + regulator-name = "vccio_sd"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + vcc3v3_s0: SWITCH_REG { > + regulator-name = "vcc3v3_s0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + }; > + }; > + > + vdd_cpu_b: regulator@40 { > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vsel1_pin>; > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <875000>; > + regulator-max-microvolt = <1150000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: regulator@41 { > + compatible = "silergy,syr828"; > + reg = <0x41>; > + fcs,suspend-voltage-selector = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vsel2_pin>; > + regulator-name = "vdd_gpu"; > + regulator-min-microvolt = <875000>; > + regulator-max-microvolt = <975000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > +}; > + > +&cluster0_opp { > + opp04 { > + status = "disabled"; > + }; > + > + opp05 { > + status = "disabled"; > + }; > +}; > + > +&cluster1_opp { > + opp06 { > + opp-hz = /bits/ 64 <1500000000>; > + opp-microvolt = <1100000 1100000 1150000>; > + }; > + > + opp07 { > + status = "disabled"; > + }; > +}; > + > +&gpu_opp_table { > + opp00 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <825000 825000 975000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <297000000>; > + opp-microvolt = <825000 825000 975000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <825000 825000 975000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <500000000>; > + opp-microvolt = <875000 875000 975000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <925000 925000 975000>; > + }; ^^^ Why replicate all these OPPs, when they have identical preferred voltage in rk3399-opp.dtsi? Also GPU is not being enabled in the DT. You don't need display output support to enable the gpu right away. > + opp05 { > + status = "disabled"; > + }; > +}; > + > + ^ extra space Thank you, Ondrej > +&io_domains { > + bt656-supply = <&vcc1v8_dvp>; > + audio-supply = <&vcca1v8_codec>; > + sdmmc-supply = <&vccio_sd>; > + gpio1830-supply = <&vcc_3v0>; > + status = "okay"; > +}; > + > +&pmu_io_domains { > + pmu1830-supply = <&vcc_1v8>; > + status = "okay"; > +}; > + > +&pinctrl { > + buttons { > + pwrbtn_pin: pwrbtn-pin { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + vsel1_pin: vsel1-pin { > + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + vsel2_pin: vsel2-pin { > + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; > + disable-wp; > + max-frequency = <150000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; > + vmmc-supply = <&vcc3v3_sys>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + mmc-hs200-1_8v; > + non-removable; > + status = "okay"; > +}; > + > +&tsadc { > + rockchip,hw-tshut-mode = <1>; > + rockchip,hw-tshut-polarity = <1>; > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > -- > 2.37.1 >
Thanks for the review Megi. On Mon, 22 Aug 2022, at 8:33 AM, Ondřej Jirman wrote: >> + vdd_center: DCDC_REG2 { >> + regulator-name = "vdd_center"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <800000>; >> + regulator-max-microvolt = <1350000>; > > Looks like a wrong top voltage. https://megous.com/dl/tmp/ad3dcc62bd00f41f.png I will fix this in v5. >> + vcca3v0_codec: LDO_REG1 { >> + regulator-name = "vcca3v0_codec"; >> + regulator-always-on; >> + regulator-boot-on; > > This should not be always on, but only enabled by the codec when needed. > You don't have codec described in this DT. I will fix this in v5. >> + vcc3v0_touch: LDO_REG2 { >> + regulator-name = "vcc3v0_touch"; >> + regulator-always-on; >> + regulator-boot-on; > > This should not be always on. It should be enabled by touch controller, > when needed. You don't have touch controller described in this DT. I will fix this in v5. >> + vcca1v8_codec: LDO_REG3 { >> + regulator-name = "vcca1v8_codec"; >> + regulator-always-on; >> + regulator-boot-on; > > This should not be always on, but only enabled by the codec when needed, > I suppose. Also modem codec is supplied by vcc1v8_codec which may need > a gpio configured as pull-down or drive low to be properly disabled, > and it is not defined in this DT. Please make sure that regulator's input > doesn't float and is disabled by default. I will fix this in v5, including adding a regulator for vcc1v8_codec. >> +&gpu_opp_table { >> + opp00 { >> + opp-hz = /bits/ 64 <200000000>; >> + opp-microvolt = <825000 825000 975000>; >> + }; >> + opp01 { >> + opp-hz = /bits/ 64 <297000000>; >> + opp-microvolt = <825000 825000 975000>; >> + }; >> + opp02 { >> + opp-hz = /bits/ 64 <400000000>; >> + opp-microvolt = <825000 825000 975000>; >> + }; >> + opp03 { >> + opp-hz = /bits/ 64 <500000000>; >> + opp-microvolt = <875000 875000 975000>; >> + }; >> + opp04 { >> + opp-hz = /bits/ 64 <600000000>; >> + opp-microvolt = <925000 925000 975000>; >> + }; > > ^^^ Why replicate all these OPPs, when they have identical preferred voltage > in rk3399-opp.dtsi? Also GPU is not being enabled in the DT. > > You don't need display output support to enable the gpu right away. My bad, I had forgotten that I'd originally decided to leave this out of the first patch series. I will address this in the patch series when I enable the GPU. >> + opp05 { >> + status = "disabled"; >> + }; >> +}; >> + >> + > > ^ extra space I will fix this in v5.
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ef79a672804a..cb42e0a15808 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinephone-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts new file mode 100644 index 000000000000..f0be897d4e84 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -0,0 +1,422 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl> + * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu> + */ + +/* + * PinePhone Pro datasheet: + * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf + */ + +/dts-v1/; +#include <dt-bindings/input/linux-event-codes.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Pine64 PinePhonePro"; + compatible = "pine64,pinephone-pro", "rockchip,rk3399"; + chassis-type = "handset"; + + aliases { + mmc0 = &sdio0; + mmc1 = &sdmmc; + mmc2 = &sdhci; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn_pin>; + + key-power { + debounce-interval = <20>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + }; + + vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + }; + + vcc3v3_sys: vcc3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; + + vcca1v8_s3: vcc1v8-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcca1v8_s3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk818: pmic@1c { + compatible = "rockchip,rk818"; + reg = <0x1c>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc3v3_sys>; + + regulators { + vdd_cpu_l: DCDC_REG1 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <875000>; + regulator-max-microvolt = <975000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_center: DCDC_REG2 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcca3v0_codec: LDO_REG1 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v0_touch: LDO_REG2 { + regulator-name = "vcc3v0_touch"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_codec: LDO_REG3 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + rk818_pwr_on: LDO_REG4 { + regulator-name = "rk818_pwr_on"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: LDO_REG5 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG7 { + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc3v3_s3: LDO_REG8 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG9 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vcc3v3_s0: SWITCH_REG { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <875000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <875000>; + regulator-max-microvolt = <975000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&cluster0_opp { + opp04 { + status = "disabled"; + }; + + opp05 { + status = "disabled"; + }; +}; + +&cluster1_opp { + opp06 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1100000 1100000 1150000>; + }; + + opp07 { + status = "disabled"; + }; +}; + +&gpu_opp_table { + opp00 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000 825000 975000>; + }; + opp01 { + opp-hz = /bits/ 64 <297000000>; + opp-microvolt = <825000 825000 975000>; + }; + opp02 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000 825000 975000>; + }; + opp03 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <875000 875000 975000>; + }; + opp04 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <925000 925000 975000>; + }; + opp05 { + status = "disabled"; + }; +}; + + +&io_domains { + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vccio_sd>; + gpio1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_1v8>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn_pin: pwrbtn-pin { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + vmmc-supply = <&vcc3v3_sys>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +};