| Message ID | 20220831065100.27722-1-tinghan.shen@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] arm64: dts: mediatek: Fix build warnings of mt8173 vcodec nodes | expand |
Applied, thanks! On 31/08/2022 08:51, Tinghan Shen wrote: > Correct the phandle of power domain node referenced by vcodec nodes. > > arch/arm64/boot/dts/mediatek/mt8173.dtsi:1450.35-1471.5: Warning (power_domains_property): /soc/vcodec@18002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) > arch/arm64/boot/dts/mediatek/mt8173.dtsi:1502.35-1522.5: Warning (power_domains_property): /soc/vcodec@19002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) > > Fixes: d3dfd4688574 ("arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings") > Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index b4d48f8b7eeb..7640b5158ff9 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -1467,7 +1467,7 @@ > clock-names = "venc_sel"; > assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; > assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; > - power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; > + power-domains = <&spm MT8173_POWER_DOMAIN_VENC>; > }; > > jpegdec: jpegdec@18004000 { > @@ -1518,7 +1518,7 @@ > assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; > assigned-clock-parents = > <&topckgen CLK_TOP_VCODECPLL_370P5>; > - power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC_LT>; > + power-domains = <&spm MT8173_POWER_DOMAIN_VENC_LT>; > }; > }; > };
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index b4d48f8b7eeb..7640b5158ff9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -1467,7 +1467,7 @@ clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; + power-domains = <&spm MT8173_POWER_DOMAIN_VENC>; }; jpegdec: jpegdec@18004000 { @@ -1518,7 +1518,7 @@ assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC_LT>; + power-domains = <&spm MT8173_POWER_DOMAIN_VENC_LT>; }; }; };
Correct the phandle of power domain node referenced by vcodec nodes. arch/arm64/boot/dts/mediatek/mt8173.dtsi:1450.35-1471.5: Warning (power_domains_property): /soc/vcodec@18002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) arch/arm64/boot/dts/mediatek/mt8173.dtsi:1502.35-1522.5: Warning (power_domains_property): /soc/vcodec@19002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) Fixes: d3dfd4688574 ("arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings") Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)