| Message ID | 1662171184-25211-2-git-send-email-quic_krichai@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | PCI: qcom: sc7280: add missing aggre0, aggre1 and ddrs sf tbu clocks | expand |
On Sat, 3 Sept 2022 at 05:23, Krishna chaitanya chundru <quic_krichai@quicinc.com> wrote: > > Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver. > > If these clocks are not presenti, the PCIe link goes down in system suspend > and resume. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> This does not apply onto the linux-next. If this is a fix intended for the current master or for the linux-stable please state so. > --- > drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 2ea1375..a7202f0 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { > static const struct qcom_pcie_cfg sc7280_cfg = { > .ops = &ops_1_9_0, > .has_tbu_clk = true, > + .has_ddrss_sf_tbu_clk = true, > .pipe_clk_need_muxing = true, > + .has_aggre0_clk = true, > + .has_aggre1_clk = true, > }; > > static const struct qcom_pcie_cfg sc8180x_cfg = { > -- > 2.7.4 >
On Sat, Sep 03, 2022 at 07:43:02AM +0530, Krishna chaitanya chundru wrote: > Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver. > > If these clocks are not presenti, the PCIe link goes down in system suspend > and resume. s/presenti/present/ But the hardware clocks are present regardless of this driver change. I suspect the point of this is really that if the driver doesn't clk_get() these clocks to increase the reference count, we don't know that the clocks are in use, and since they appear unused, they get turned off during suspend. > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 2ea1375..a7202f0 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { > static const struct qcom_pcie_cfg sc7280_cfg = { > .ops = &ops_1_9_0, > .has_tbu_clk = true, > + .has_ddrss_sf_tbu_clk = true, > .pipe_clk_need_muxing = true, > + .has_aggre0_clk = true, > + .has_aggre1_clk = true, > }; > > static const struct qcom_pcie_cfg sc8180x_cfg = { > -- > 2.7.4 >
On 9/8/2022 12:14 AM, Bjorn Helgaas wrote: > On Sat, Sep 03, 2022 at 07:43:02AM +0530, Krishna chaitanya chundru wrote: >> Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver. >> >> If these clocks are not presenti, the PCIe link goes down in system suspend >> and resume. > s/presenti/present/ > > But the hardware clocks are present regardless of this driver change. > > I suspect the point of this is really that if the driver doesn't > clk_get() these clocks to increase the reference count, we don't know > that the clocks are in use, and since they appear unused, they get > turned off during suspend. Yes, these are present in the hardware. As we are not voting for these clocks from our driver in the system suspend these clocks can be turn off. >> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >> index 2ea1375..a7202f0 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >> @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { >> static const struct qcom_pcie_cfg sc7280_cfg = { >> .ops = &ops_1_9_0, >> .has_tbu_clk = true, >> + .has_ddrss_sf_tbu_clk = true, >> .pipe_clk_need_muxing = true, >> + .has_aggre0_clk = true, >> + .has_aggre1_clk = true, >> }; >> >> static const struct qcom_pcie_cfg sc8180x_cfg = { >> -- >> 2.7.4 >>
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 2ea1375..a7202f0 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { static const struct qcom_pcie_cfg sc7280_cfg = { .ops = &ops_1_9_0, .has_tbu_clk = true, + .has_ddrss_sf_tbu_clk = true, .pipe_clk_need_muxing = true, + .has_aggre0_clk = true, + .has_aggre1_clk = true, }; static const struct qcom_pcie_cfg sc8180x_cfg = {
Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver. If these clocks are not presenti, the PCIe link goes down in system suspend and resume. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> --- drivers/pci/controller/dwc/pcie-qcom.c | 3 +++ 1 file changed, 3 insertions(+)