mbox series

[RESEND,v3,0/6] STM32 DMA-MDMA chaining feature

Message ID 20220829154646.29867-1-amelie.delaunay@foss.st.com (mailing list archive)
Headers show
Series STM32 DMA-MDMA chaining feature | expand

Message

Amelie Delaunay Aug. 29, 2022, 3:46 p.m. UTC 
This patchset (re)introduces STM32 DMA-MDMA chaining feature.

As the DMA is not able to generate convenient burst transfer on the DDR,
it penalises the AXI bus when accessing the DDR. While it accesses
optimally the SRAM. The DMA-MDMA chaining then consists in having an SRAM
buffer between DMA and MDMA, so the DMA deals with peripheral and SRAM,
and the MDMA with SRAM and DDR.

The feature relies on the fact that DMA channel Transfer Complete signal
can trigger a MDMA channel transfer and MDMA can clear the DMA request by
writing to DMA Interrupt Clear register.

A deeper introduction can be found in patch 1.

Previous implementation [1] has been dropped as nacked.
Unlike this previous implementation (where all the stuff was embedded in
stm32-dma driver), the user (in peripheral drivers using dma) has now to
configure the MDMA channel.

[1] https://lore.kernel.org/lkml/1538139715-24406-1-git-send-email-pierre-yves.mordret@st.com/

Changes in v3:
- introduce two prior patches to help readibility
- fix stm32-dma struct stm32_dma_mdma_config documentation

Changes in v2:
- wrap to 80-column limit for documentation
- add an entry for this documentation in index.rst
- use simple table instead of csv-table in documentation

Amelie Delaunay (6):
  dmaengine: stm32-dma: introduce 3 helpers to address channel flags
  dmaengine: stm32-dma: use bitfield helpers
  docs: arm: stm32: introduce STM32 DMA-MDMA chaining feature
  dmaengine: stm32-dmamux: set dmamux channel id in dma features
    bitfield
  dmaengine: stm32-dma: add support to trigger STM32 MDMA
  dmaengine: stm32-mdma: add support to be triggered by STM32 DMA

 Documentation/arm/index.rst                   |   1 +
 .../arm/stm32/stm32-dma-mdma-chaining.rst     | 415 ++++++++++++++++++
 drivers/dma/stm32-dma.c                       | 136 +++---
 drivers/dma/stm32-dmamux.c                    |   2 +-
 drivers/dma/stm32-mdma.c                      |  70 ++-
 5 files changed, 569 insertions(+), 55 deletions(-)
 create mode 100644 Documentation/arm/stm32/stm32-dma-mdma-chaining.rst

Comments

Vinod Koul Sept. 4, 2022, 5:18 p.m. UTC | #1 
On 29-08-22, 17:46, Amelie Delaunay wrote:
> This patchset (re)introduces STM32 DMA-MDMA chaining feature.
> 
> As the DMA is not able to generate convenient burst transfer on the DDR,
> it penalises the AXI bus when accessing the DDR. While it accesses
> optimally the SRAM. The DMA-MDMA chaining then consists in having an SRAM
> buffer between DMA and MDMA, so the DMA deals with peripheral and SRAM,
> and the MDMA with SRAM and DDR.
> 
> The feature relies on the fact that DMA channel Transfer Complete signal
> can trigger a MDMA channel transfer and MDMA can clear the DMA request by
> writing to DMA Interrupt Clear register.
> 
> A deeper introduction can be found in patch 1.
> 
> Previous implementation [1] has been dropped as nacked.
> Unlike this previous implementation (where all the stuff was embedded in
> stm32-dma driver), the user (in peripheral drivers using dma) has now to
> configure the MDMA channel.

Applied, thanks