diff mbox series

arm64: dts: imx8mn: remove GPU power domain reset

Message ID 20220826190448.3213614-1-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mn: remove GPU power domain reset | expand

Commit Message

Lucas Stach Aug. 26, 2022, 7:04 p.m. UTC 
From: Marco Felsch <m.felsch@pengutronix.de>

The PGC (power gating controller) already handles the reset for the
GPUMIX power domain. By specifying it within the device tree the reset
it issued a 2nd time. This confuses the hardware during power up and
sporadically hangs the SoC. Fix this by removing the reset property and
let the hardware handle the reset.

Fixes: 9a0f3b157e22e ("arm64: dts: imx8mn: Enable GPU")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
 1 file changed, 1 deletion(-)

Comments

Adam Ford Aug. 26, 2022, 8:46 p.m. UTC | #1 
On Fri, Aug 26, 2022 at 2:04 PM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> From: Marco Felsch <m.felsch@pengutronix.de>
>
> The PGC (power gating controller) already handles the reset for the
> GPUMIX power domain. By specifying it within the device tree the reset
> it issued a 2nd time. This confuses the hardware during power up and
> sporadically hangs the SoC. Fix this by removing the reset property and
> let the hardware handle the reset.
>
I was noticing this too.  When using the downstream NXP kernel with
the upstream GPC and blkctrl drivers, it could lock up the whole
system.  With this removed it fixed it.

Tested-by: Adam Ford <aford173@gmail.com>

> Fixes: 9a0f3b157e22e ("arm64: dts: imx8mn: Enable GPU")
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 0c71b740a316..cb2836bfbd95 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -672,7 +672,6 @@ pgc_gpumix: power-domain@2 {
>                                                          <&clk IMX8MN_CLK_GPU_SHADER>,
>                                                          <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
>                                                          <&clk IMX8MN_CLK_GPU_AHB>;
> -                                               resets = <&src IMX8MQ_RESET_GPU_RESET>;
>                                         };
>
>                                         pgc_dispmix: power-domain@3 {
> --
> 2.30.2
>
Shawn Guo Sept. 5, 2022, 1:29 a.m. UTC | #2 
On Fri, Aug 26, 2022 at 09:04:48PM +0200, Lucas Stach wrote:
> From: Marco Felsch <m.felsch@pengutronix.de>
> 
> The PGC (power gating controller) already handles the reset for the
> GPUMIX power domain. By specifying it within the device tree the reset
> it issued a 2nd time. This confuses the hardware during power up and
> sporadically hangs the SoC. Fix this by removing the reset property and
> let the hardware handle the reset.
> 
> Fixes: 9a0f3b157e22e ("arm64: dts: imx8mn: Enable GPU")
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 0c71b740a316..cb2836bfbd95 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -672,7 +672,6 @@  pgc_gpumix: power-domain@2 {
 							 <&clk IMX8MN_CLK_GPU_SHADER>,
 							 <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
 							 <&clk IMX8MN_CLK_GPU_AHB>;
-						resets = <&src IMX8MQ_RESET_GPU_RESET>;
 					};
 
 					pgc_dispmix: power-domain@3 {