| Message ID | 20220907223927.139858-2-mailingradian@gmail.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | SDM670 Global Clocks | expand |
On 08/09/2022 00:39, Richard Acayan wrote: > The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most > of the new clocks, GDSCs, and resets already have reserved IDs but there > are some resources that don't. Add the new clock and extra BCR from > Snapdragon 670 and document the differences between the SoC parent clocks. > > Signed-off-by: Richard Acayan <mailingradian@gmail.com> Thank you for your patch. There is something to discuss/improve. > '#clock-cells': > const: 1 > @@ -63,6 +57,46 @@ required: > - '#reset-cells' > - '#power-domain-cells' > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: qcom,gcc-sdm845 > + then: > + properties: > + clocks: > + items: > + - description: Board XO source > + - description: Board active XO source > + - description: Sleep clock source > + - description: PCIE 0 Pipe clock source > + - description: PCIE 1 Pipe clock source > + clock-names: > + items: > + - const: bi_tcxo > + - const: bi_tcxo_ao > + - const: sleep_clk > + - const: pcie_0_pipe_clk > + - const: pcie_1_pipe_clk Blank line here. With this: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
> > + clock-names: > > + items: > > + - const: bi_tcxo > > + - const: bi_tcxo_ao > > + - const: sleep_clk > > + - const: pcie_0_pipe_clk > > + - const: pcie_1_pipe_clk > > Blank line here. > > With this: > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Thanks for reviewing. While I'm at it, I might as well swap sdm670 and sdm845 if statements so they're at least in the same order as in the enum (I don't know what order to put them in).
On 09/09/2022 01:01, Richard Acayan wrote: >>> + clock-names: >>> + items: >>> + - const: bi_tcxo >>> + - const: bi_tcxo_ao >>> + - const: sleep_clk >>> + - const: pcie_0_pipe_clk >>> + - const: pcie_1_pipe_clk >> >> Blank line here. >> >> With this: >> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Thanks for reviewing. While I'm at it, I might as well swap sdm670 and > sdm845 if statements so they're at least in the same order as in the enum > (I don't know what order to put them in). Put them in alphabetical order. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml index daf7906ebc40..661e89599a10 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml @@ -19,23 +19,17 @@ description: | properties: compatible: - const: qcom,gcc-sdm845 + enum: + - qcom,gcc-sdm670 + - qcom,gcc-sdm845 clocks: - items: - - description: Board XO source - - description: Board active XO source - - description: Sleep clock source - - description: PCIE 0 Pipe clock source - - description: PCIE 1 Pipe clock source + minItems: 3 + maxItems: 5 clock-names: - items: - - const: bi_tcxo - - const: bi_tcxo_ao - - const: sleep_clk - - const: pcie_0_pipe_clk - - const: pcie_1_pipe_clk + minItems: 3 + maxItems: 5 '#clock-cells': const: 1 @@ -63,6 +57,46 @@ required: - '#reset-cells' - '#power-domain-cells' +allOf: + - if: + properties: + compatible: + contains: + const: qcom,gcc-sdm845 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board active XO source + - description: Sleep clock source + - description: PCIE 0 Pipe clock source + - description: PCIE 1 Pipe clock source + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: sleep_clk + - const: pcie_0_pipe_clk + - const: pcie_1_pipe_clk + - if: + properties: + compatible: + contains: + const: qcom,gcc-sdm670 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board active XO source + - description: Sleep clock source + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: sleep_clk + additionalProperties: false examples: diff --git a/include/dt-bindings/clock/qcom,gcc-sdm845.h b/include/dt-bindings/clock/qcom,gcc-sdm845.h index 968fa65b9c42..9fef78fd031d 100644 --- a/include/dt-bindings/clock/qcom,gcc-sdm845.h +++ b/include/dt-bindings/clock/qcom,gcc-sdm845.h @@ -199,6 +199,7 @@ #define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189 #define GCC_LPASS_Q6_AXI_CLK 190 #define GCC_LPASS_SWAY_CLK 191 +#define GPLL6 192 /* GCC Resets */ #define GCC_MMSS_BCR 0 @@ -227,6 +228,7 @@ #define GCC_USB_PHY_CFG_AHB2PHY_BCR 23 #define GCC_PCIE_0_PHY_BCR 24 #define GCC_PCIE_1_PHY_BCR 25 +#define GCC_SDCC1_BCR 26 /* GCC GDSCRs */ #define PCIE_0_GDSC 0
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most of the new clocks, GDSCs, and resets already have reserved IDs but there are some resources that don't. Add the new clock and extra BCR from Snapdragon 670 and document the differences between the SoC parent clocks. Signed-off-by: Richard Acayan <mailingradian@gmail.com> --- .../bindings/clock/qcom,gcc-sdm845.yaml | 60 +++++++++++++++---- include/dt-bindings/clock/qcom,gcc-sdm845.h | 2 + 2 files changed, 49 insertions(+), 13 deletions(-)