| Message ID | 20220906135511.144725-14-sergiu.moga@microchip.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Make atmel serial driver aware of GCLK | expand |
On 06/09/2022 15:55, Sergiu Moga wrote: > The Devicetree nodes for FLEXCOM's USART can also have an alternative > clock source for the baudrate generator (other than the peripheral > clock), namely the Generick Clock. Thus make the binding aware of > this potential clock that someone may place in the clock related > properties of the USART node. Last sentence is confusing - what is the potential? Just skip it. > > Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> > --- > > > > v1 -> v2: > - Nothing, this patch was not here before You have confusing order of patches. Bindings mixed with DTS mixed with drivers. Keep things ordered. 1. DTS changes needed for aligning to schema. 2. all bindings 3. rest Best regards, Krzysztof
On 08.09.2022 15:35, Krzysztof Kozlowski wrote: > On 06/09/2022 15:55, Sergiu Moga wrote: >> The Devicetree nodes for FLEXCOM's USART can also have an alternative >> clock source for the baudrate generator (other than the peripheral >> clock), namely the Generick Clock. Thus make the binding aware of >> this potential clock that someone may place in the clock related >> properties of the USART node. > > Last sentence is confusing - what is the potential? Just skip it. > I am sorry, I meant to say "possible". No idea how I ended up writing "potential". Guess I will just skip any adjectives entirely. >> >> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> >> --- >> >> >> >> v1 -> v2: >> - Nothing, this patch was not here before > > You have confusing order of patches. Bindings mixed with DTS mixed with > drivers. Keep things ordered. > 1. DTS changes needed for aligning to schema. > 2. all bindings > 3. rest > Alright, it makes sense, will do so. I thought it would have looked better if I were to add the gclk in the schema after adding it in the drivers. Other than that I hope I got the example[1] you have previously given me right. [1] https://elixir.bootlin.com/linux/v6.0-rc4/source/Documentation/devicetree/bindings/example-schema.yaml#L91 > Best regards, > Krzysztof Thanks, Sergiu
diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml index 4d80006963c7..db595b498bad 100644 --- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml +++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml @@ -36,10 +36,16 @@ properties: maxItems: 1 clock-names: - const: usart + minItems: 1 + items: + - const: usart + - const: gclk clocks: - maxItems: 1 + minItems: 1 + items: + - description: USART Peripheral Clock + - description: USART Generic Clock dmas: items:
The Devicetree nodes for FLEXCOM's USART can also have an alternative clock source for the baudrate generator (other than the peripheral clock), namely the Generick Clock. Thus make the binding aware of this potential clock that someone may place in the clock related properties of the USART node. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> --- v1 -> v2: - Nothing, this patch was not here before .../devicetree/bindings/serial/atmel,at91-usart.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)