diff mbox series

target/arm: Fix alignment for VLD4.32

Message ID 20220914105058.2787404-1-chigot@adacore.com (mailing list archive)
State New, archived
Headers show
Series target/arm: Fix alignment for VLD4.32 | expand

Commit Message

Clément Chigot Sept. 14, 2022, 10:50 a.m. UTC
When requested, the alignment for VLD4.32 is 8 and not 16.

See ARM documentation about VLD4 encoding:
    ebytes = 1 << UInt(size);
    if size == '10' then
        alignment = if a == '0' then 1 else 8;
    else
        alignment = if a == '0' then 1 else 4*ebytes;

Signed-off-by: Clément Chigot <chigot@adacore.com>
---
 target/arm/translate-neon.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Richard Henderson Sept. 14, 2022, 1:11 p.m. UTC | #1
On 9/14/22 11:50, Clément Chigot wrote:
> When requested, the alignment for VLD4.32 is 8 and not 16.
> 
> See ARM documentation about VLD4 encoding:
>      ebytes = 1 << UInt(size);
>      if size == '10' then
>          alignment = if a == '0' then 1 else 8;
>      else
>          alignment = if a == '0' then 1 else 4*ebytes;
> 
> Signed-off-by: Clément Chigot <chigot@adacore.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

> ---
>   target/arm/translate-neon.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c
> index 321c17e2c7..4016339d46 100644
> --- a/target/arm/translate-neon.c
> +++ b/target/arm/translate-neon.c
> @@ -584,7 +584,11 @@ static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a)
>           case 3:
>               return false;
>           case 4:
> -            align = pow2_align(size + 2);
> +            if (size == 2) {
> +                align = pow2_align(3);
> +            } else {
> +                align = pow2_align(size + 2);
> +            }
>               break;
>           default:
>               g_assert_not_reached();
Peter Maydell Sept. 20, 2022, 10:24 a.m. UTC | #2
On Wed, 14 Sept 2022 at 14:11, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 9/14/22 11:50, Clément Chigot wrote:
> > When requested, the alignment for VLD4.32 is 8 and not 16.
> >
> > See ARM documentation about VLD4 encoding:
> >      ebytes = 1 << UInt(size);
> >      if size == '10' then
> >          alignment = if a == '0' then 1 else 8;
> >      else
> >          alignment = if a == '0' then 1 else 4*ebytes;
> >
> > Signed-off-by: Clément Chigot <chigot@adacore.com>
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



Applied to target-arm.next, thanks.

-- PMM
diff mbox series

Patch

diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c
index 321c17e2c7..4016339d46 100644
--- a/target/arm/translate-neon.c
+++ b/target/arm/translate-neon.c
@@ -584,7 +584,11 @@  static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a)
         case 3:
             return false;
         case 4:
-            align = pow2_align(size + 2);
+            if (size == 2) {
+                align = pow2_align(3);
+            } else {
+                align = pow2_align(size + 2);
+            }
             break;
         default:
             g_assert_not_reached();