| Message ID | 20220914192604.265859-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 1089877ada8d2da5f173922f1061ccfe721ebf56 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,v5] ravb: Add RZ/G2L MII interface support | expand |
On 9/14/22 10:26 PM, Biju Das wrote: > EMAC IP found on RZ/G2L Gb ethernet supports MII interface. > This patch adds support for selecting MII interface mode. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> [...] MBR, Sergey
Hello: This patch was applied to netdev/net-next.git (master) by Jakub Kicinski <kuba@kernel.org>: On Wed, 14 Sep 2022 20:26:04 +0100 you wrote: > EMAC IP found on RZ/G2L Gb ethernet supports MII interface. > This patch adds support for selecting MII interface mode. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v4->v5: > * Reorderd enum CXR35_BIT from LSB to MSB > v3->v4: > * Dropped CXR35_HALFCYC_CLKSW1000 enum > * Added CXR35_HALFCYC_CLKSW, CXR35_SEL_XMII and CXR35_SEL_XMII_RGMII > enum. > v2->v3: > * Documented CXR35_HALFCYC_CLKSW1000 and CXR35_SEL_XMII_MII enum. > v1->v2: > * Fixed spaces->Tab around CXR35 description. > > [...] Here is the summary with links: - [net-next,v5] ravb: Add RZ/G2L MII interface support https://git.kernel.org/netdev/net-next/c/1089877ada8d You are awesome, thank you!
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index b980bce763d3..e0f8276cffed 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -189,6 +189,7 @@ enum ravb_reg { PSR = 0x0528, PIPR = 0x052c, CXR31 = 0x0530, /* RZ/G2L only */ + CXR35 = 0x0540, /* RZ/G2L only */ MPR = 0x0558, PFTCR = 0x055c, PFRCR = 0x0560, @@ -965,6 +966,13 @@ enum CXR31_BIT { CXR31_SEL_LINK1 = 0x00000008, }; +enum CXR35_BIT { + CXR35_SEL_XMII = 0x00000003, + CXR35_SEL_XMII_RGMII = 0x00000000, + CXR35_SEL_XMII_MII = 0x00000002, + CXR35_HALFCYC_CLKSW = 0xffff0000, +}; + enum CSR0_BIT { CSR0_TPE = 0x00000010, CSR0_RPE = 0x00000020, diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index b357ac4c56c5..421c8ff1ce1f 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -540,7 +540,13 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) /* E-MAC interrupt enable register */ ravb_write(ndev, ECSIPR_ICDIP, ECSIPR); - ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, CXR31_SEL_LINK0); + if (priv->phy_interface == PHY_INTERFACE_MODE_MII) { + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0); + ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35); + } else { + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, + CXR31_SEL_LINK0); + } } static void ravb_emac_init_rcar(struct net_device *ndev)
EMAC IP found on RZ/G2L Gb ethernet supports MII interface. This patch adds support for selecting MII interface mode. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v4->v5: * Reorderd enum CXR35_BIT from LSB to MSB v3->v4: * Dropped CXR35_HALFCYC_CLKSW1000 enum * Added CXR35_HALFCYC_CLKSW, CXR35_SEL_XMII and CXR35_SEL_XMII_RGMII enum. v2->v3: * Documented CXR35_HALFCYC_CLKSW1000 and CXR35_SEL_XMII_MII enum. v1->v2: * Fixed spaces->Tab around CXR35 description. --- drivers/net/ethernet/renesas/ravb.h | 8 ++++++++ drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++- 2 files changed, 15 insertions(+), 1 deletion(-)