Message ID | 1663927104-15506-3-git-send-email-xinlei.lee@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add dpi output format control for MT8186 | expand |
Hi, Xinlei: After change the title to 'Set dpi format in mmsys', Reviewed-by: CK Hu <ck.hu@mediatek.com> Regards, CK On Fri, 2022-09-23 at 17:58 +0800, xinlei.lee@mediatek.com wrote: > From: Xinlei Lee <xinlei.lee@mediatek.com> > > Dpi output needs to adjust the output format to dual edge for MT8186. > > Co-developed-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 630a4e301ef6..ad87ecddf58d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -15,6 +15,7 @@ > #include <linux/of_graph.h> > #include <linux/pinctrl/consumer.h> > #include <linux/platform_device.h> > +#include <linux/soc/mediatek/mtk-mmsys.h> > #include <linux/types.h> > > #include <video/videomode.h> > @@ -30,6 +31,7 @@ > #include "mtk_disp_drv.h" > #include "mtk_dpi_regs.h" > #include "mtk_drm_ddp_comp.h" > +#include "mtk_drm_drv.h" > > enum mtk_dpi_out_bit_num { > MTK_DPI_OUT_BIT_NUM_8BITS, > @@ -67,6 +69,7 @@ struct mtk_dpi { > struct drm_connector *connector; > void __iomem *regs; > struct device *dev; > + struct device *mmsys_dev; > struct clk *engine_clk; > struct clk *pixel_clk; > struct clk *tvd_clk; > @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit { > * @yuv422_en_bit: Enable bit of yuv422. > * @csc_enable_bit: Enable bit of CSC. > * @pixels_per_iter: Quantity of transferred pixels per iteration. > + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output > needs to be set in MMSYS. > */ > struct mtk_dpi_conf { > unsigned int (*cal_factor)(int clock); > @@ -153,6 +157,7 @@ struct mtk_dpi_conf { > u32 yuv422_en_bit; > u32 csc_enable_bit; > u32 pixels_per_iter; > + bool edge_cfg_in_mmsys; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, > u32 mask) > @@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi > *dpi) > mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, > dpi->output_fmt == > MEDIA_BUS_FMT_RGB888_2X12_LE ? > EDGE_SEL : 0, EDGE_SEL); > + if (dpi->conf->edge_cfg_in_mmsys) > + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, > MTK_DPI_RGB888_DDR_CON); > } else { > mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, > 0); > + if (dpi->conf->edge_cfg_in_mmsys) > + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, > MTK_DPI_RGB888_SDR_CON); > } > } > > @@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev, > struct device *master, void *data) > { > struct mtk_dpi *dpi = dev_get_drvdata(dev); > struct drm_device *drm_dev = data; > + struct mtk_drm_private *priv = drm_dev->dev_private; > int ret; > > + dpi->mmsys_dev = priv->mmsys_dev; > ret = drm_simple_encoder_init(drm_dev, &dpi->encoder, > DRM_MODE_ENCODER_TMDS); > if (ret) {
Il 23/09/22 11:58, xinlei.lee@mediatek.com ha scritto: > From: Xinlei Lee <xinlei.lee@mediatek.com> > > Dpi output needs to adjust the output format to dual edge for MT8186. > > Co-developed-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 630a4e301ef6..ad87ecddf58d 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -15,6 +15,7 @@ #include <linux/of_graph.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> +#include <linux/soc/mediatek/mtk-mmsys.h> #include <linux/types.h> #include <video/videomode.h> @@ -30,6 +31,7 @@ #include "mtk_disp_drv.h" #include "mtk_dpi_regs.h" #include "mtk_drm_ddp_comp.h" +#include "mtk_drm_drv.h" enum mtk_dpi_out_bit_num { MTK_DPI_OUT_BIT_NUM_8BITS, @@ -67,6 +69,7 @@ struct mtk_dpi { struct drm_connector *connector; void __iomem *regs; struct device *dev; + struct device *mmsys_dev; struct clk *engine_clk; struct clk *pixel_clk; struct clk *tvd_clk; @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit { * @yuv422_en_bit: Enable bit of yuv422. * @csc_enable_bit: Enable bit of CSC. * @pixels_per_iter: Quantity of transferred pixels per iteration. + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS. */ struct mtk_dpi_conf { unsigned int (*cal_factor)(int clock); @@ -153,6 +157,7 @@ struct mtk_dpi_conf { u32 yuv422_en_bit; u32 csc_enable_bit; u32 pixels_per_iter; + bool edge_cfg_in_mmsys; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi *dpi) mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ? EDGE_SEL : 0, EDGE_SEL); + if (dpi->conf->edge_cfg_in_mmsys) + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_DDR_CON); } else { mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0); + if (dpi->conf->edge_cfg_in_mmsys) + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_SDR_CON); } } @@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) { struct mtk_dpi *dpi = dev_get_drvdata(dev); struct drm_device *drm_dev = data; + struct mtk_drm_private *priv = drm_dev->dev_private; int ret; + dpi->mmsys_dev = priv->mmsys_dev; ret = drm_simple_encoder_init(drm_dev, &dpi->encoder, DRM_MODE_ENCODER_TMDS); if (ret) {