| Message ID | 1663934771-15152-1-git-send-email-xinlei.lee@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm | expand |
Il 23/09/22 14:06, xinlei.lee@mediatek.com ha scritto: > From: xinlei lee <xinlei.lee@mediatek.com> > > In the original mtk_disp_pwm_get_state() function, the result of reading > con0 & BIT(0) is enabled as disp_pwm. > In order to conform to the register table, we should use the disp_pwm > base address as the enabled judgment. > > Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()") > > Signed-off-by: xinlei lee <xinlei.lee@mediatek.com> > --- > Base on the branch of Linux-next/master. > > change since v1: > 1. Modify the way to set disp_pwm enbale. > --- > --- > drivers/pwm/pwm-mtk-disp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c > index c605013..1a9880d 100644 > --- a/drivers/pwm/pwm-mtk-disp.c > +++ b/drivers/pwm/pwm-mtk-disp.c > @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip, > rate = clk_get_rate(mdp->clk_main); > con0 = readl(mdp->base + mdp->data->con0); > con1 = readl(mdp->base + mdp->data->con1); > - state->enabled = !!(con0 & BIT(0)); > + state->enabled = !!(readl(mdp->base + DISP_PWM_EN) & BIT(0)); I think you mean mdp->data->enable_mask here. Anyway, for the sake of human readability.... u32 clk_div, pwm_en, con0, con1; pwm_en = readl(mdp->base + DISP_PWM_EN); state->enabled = !!(pwm_en & mdp->data->enable_mask); Regards, Angelo > clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); > period = FIELD_GET(PWM_PERIOD_MASK, con1); > /* >
On Mon, 2022-09-26 at 11:13 +0200, AngeloGioacchino Del Regno wrote: > Il 23/09/22 14:06, xinlei.lee@mediatek.com ha scritto: > > From: xinlei lee <xinlei.lee@mediatek.com> > > > > In the original mtk_disp_pwm_get_state() function, the result of > > reading > > con0 & BIT(0) is enabled as disp_pwm. > > In order to conform to the register table, we should use the > > disp_pwm > > base address as the enabled judgment. > > > > Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API > > .get_state()") > > > > Signed-off-by: xinlei lee <xinlei.lee@mediatek.com> > > --- > > Base on the branch of Linux-next/master. > > > > change since v1: > > 1. Modify the way to set disp_pwm enbale. > > --- > > --- > > drivers/pwm/pwm-mtk-disp.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk- > > disp.c > > index c605013..1a9880d 100644 > > --- a/drivers/pwm/pwm-mtk-disp.c > > +++ b/drivers/pwm/pwm-mtk-disp.c > > @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct > > pwm_chip *chip, > > rate = clk_get_rate(mdp->clk_main); > > con0 = readl(mdp->base + mdp->data->con0); > > con1 = readl(mdp->base + mdp->data->con1); > > - state->enabled = !!(con0 & BIT(0)); > > + state->enabled = !!(readl(mdp->base + DISP_PWM_EN) & BIT(0)); > > I think you mean mdp->data->enable_mask here. > > Anyway, for the sake of human readability.... > > u32 clk_div, pwm_en, con0, con1; > > pwm_en = readl(mdp->base + DISP_PWM_EN); > > state->enabled = !!(pwm_en & mdp->data->enable_mask); > > Regards, > Angelo > > > clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); > > period = FIELD_GET(PWM_PERIOD_MASK, con1); > > /* > > > > Hi Angelo: Thanks for your suggestion. I will modify the code for readability. Best Regards! Xinlei
diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index c605013..1a9880d 100644 --- a/drivers/pwm/pwm-mtk-disp.c +++ b/drivers/pwm/pwm-mtk-disp.c @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip, rate = clk_get_rate(mdp->clk_main); con0 = readl(mdp->base + mdp->data->con0); con1 = readl(mdp->base + mdp->data->con1); - state->enabled = !!(con0 & BIT(0)); + state->enabled = !!(readl(mdp->base + DISP_PWM_EN) & BIT(0)); clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); period = FIELD_GET(PWM_PERIOD_MASK, con1); /*