| Message ID | ff7cdcdef82f6c9d709e2b6ed5d91e255327b780.1663894792.git.quic_asutoshd@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Multi Circular Queue Support | expand |
On Thu, Sep 22, 2022 at 06:05:08PM -0700, Asutosh Das wrote: > Task Tag is limited to 8 bits and this restricts the number > of active IOs to 255. > In Multi-circular queue mode, this may not be enough. > The specification provides EXT_IID which can be used to increase > the number of IOs if the UFS device and UFSHC support it. > This patch adds support to probe for ext_iid support in > ufs device and UFSHC. > > Co-developed-by: Can Guo <quic_cang@quicinc.com> > Signed-off-by: Can Guo <quic_cang@quicinc.com> > Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> > --- > drivers/ufs/core/ufshcd.c | 32 ++++++++++++++++++++++++++++++++ > include/ufs/ufs.h | 4 ++++ > include/ufs/ufshcd.h | 4 ++++ > include/ufs/ufshci.h | 7 +++++++ > 4 files changed, 47 insertions(+) > > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c > index f4f8ded..4b9ae83 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -88,6 +88,7 @@ > /* Polling time to wait for fDeviceInit */ > #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */ > > +#define EXT_IID_CAP_SHIFT 10 > #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ > ({ \ > int _ret; \ > @@ -2239,6 +2240,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) > if (err) > dev_err(hba->dev, "crypto setup failed\n"); > > + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); > + hba->ext_iid_sup = (hba->mcq_capabilities & MASK_EXT_IID_SUPPORT) >> > + EXT_IID_CAP_SHIFT; > + Can you use FIELD_* macros for the field manipulations throughout the series? This will avoid the use of additional _SHIFT macros. > return err; > } > > @@ -7664,6 +7669,30 @@ static void ufshcd_temp_notif_probe(struct ufs_hba *hba, const u8 *desc_buf) > } > } > > +static void ufshcd_ext_iid_probe(struct ufs_hba *hba, u8 *desc_buf) ufshcd_device_ext_iid_probe? > +{ > + struct ufs_dev_info *dev_info = &hba->dev_info; > + u32 ext_ufs_feature; > + u32 ext_iid_en = 0; > + int err; > + > + if (dev_info->wspecversion < 0x400) > + goto out; > + > + ext_ufs_feature = get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); > + No need of a newline Thanks, Mani > + if (!(ext_ufs_feature & UFS_DEV_EXT_IID_SUP)) > + goto out; > + > + err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, > + QUERY_ATTR_IDN_EXT_IID_EN, 0, 0, &ext_iid_en); > + if (err) > + dev_err(hba->dev, "failed reading bEXTIIDEn. err = %d\n", err); > + > +out: > + dev_info->b_ext_iid_en = !!ext_iid_en; > +} > + > void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, > const struct ufs_dev_quirk *fixups) > { > @@ -7762,6 +7791,9 @@ static int ufs_get_device_desc(struct ufs_hba *hba) > > ufshcd_temp_notif_probe(hba, desc_buf); > > + if (hba->ext_iid_sup) > + ufshcd_ext_iid_probe(hba, desc_buf); > + > /* > * ufshcd_read_string_desc returns size of the string > * reset the error value > diff --git a/include/ufs/ufs.h b/include/ufs/ufs.h > index 1bba3fe..ba2a1d8 100644 > --- a/include/ufs/ufs.h > +++ b/include/ufs/ufs.h > @@ -165,6 +165,7 @@ enum attr_idn { > QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D, > QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E, > QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F, > + QUERY_ATTR_IDN_EXT_IID_EN = 0x2A, > }; > > /* Descriptor idn for Query requests */ > @@ -352,6 +353,7 @@ enum { > UFS_DEV_EXT_TEMP_NOTIF = BIT(6), > UFS_DEV_HPB_SUPPORT = BIT(7), > UFS_DEV_WRITE_BOOSTER_SUP = BIT(8), > + UFS_DEV_EXT_IID_SUP = BIT(16), > }; > #define UFS_DEV_HPB_SUPPORT_VERSION 0x310 > > @@ -601,6 +603,8 @@ struct ufs_dev_info { > > bool b_rpm_dev_flush_capable; > u8 b_presrv_uspc_en; > + /* UFS EXT_IID Enable */ > + bool b_ext_iid_en; > }; > > /* > diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h > index 7fe1a92..da1eb8a 100644 > --- a/include/ufs/ufshcd.h > +++ b/include/ufs/ufshcd.h > @@ -737,6 +737,7 @@ struct ufs_hba_monitor { > * @outstanding_lock: Protects @outstanding_reqs. > * @outstanding_reqs: Bits representing outstanding transfer requests > * @capabilities: UFS Controller Capabilities > + * @mcq_capabilities: UFS Multi Command Queue capabilities > * @nutrs: Transfer Request Queue depth supported by controller > * @nutmrs: Task Management Queue depth supported by controller > * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock. > @@ -818,6 +819,7 @@ struct ufs_hba_monitor { > * device > * @complete_put: whether or not to call ufshcd_rpm_put() from inside > * ufshcd_resume_complete() > + * @ext_iid_sup: is EXT_IID is supported by UFSHC > */ > struct ufs_hba { > void __iomem *mmio_base; > @@ -859,6 +861,7 @@ struct ufs_hba { > > u32 capabilities; > int nutrs; > + u32 mcq_capabilities; > int nutmrs; > u32 reserved_slot; > u32 ufs_version; > @@ -965,6 +968,7 @@ struct ufs_hba { > #endif > u32 luns_avail; > bool complete_put; > + bool ext_iid_sup; > }; > > /* Returns true if clocks can be gated. Otherwise false */ > diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h > index f81aa95..ef5c3a8 100644 > --- a/include/ufs/ufshci.h > +++ b/include/ufs/ufshci.h > @@ -22,6 +22,7 @@ enum { > /* UFSHCI Registers */ > enum { > REG_CONTROLLER_CAPABILITIES = 0x00, > + REG_MCQCAP = 0x04, > REG_UFS_VERSION = 0x08, > REG_CONTROLLER_DEV_ID = 0x10, > REG_CONTROLLER_PROD_ID = 0x14, > @@ -68,6 +69,12 @@ enum { > MASK_OUT_OF_ORDER_DATA_DELIVERY_SUPPORT = 0x02000000, > MASK_UIC_DME_TEST_MODE_SUPPORT = 0x04000000, > MASK_CRYPTO_SUPPORT = 0x10000000, > + MASK_MCQ_SUPPORT = 0x40000000, > +}; > + > +/* MCQ capability mask */ > +enum { > + MASK_EXT_IID_SUPPORT = 0x00000400, > }; > > #define UFS_MASK(mask, offset) ((mask) << (offset)) > -- > 2.7.4 >
On 9/22/22 18:05, Asutosh Das wrote: > + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); What value is reported when reading the REG_MCQCAP register on an UFSHCI 3.0 controller? -1 or 0? > + hba->ext_iid_sup = (hba->mcq_capabilities & MASK_EXT_IID_SUPPORT) >> > + EXT_IID_CAP_SHIFT; [ ... ] > + if (dev_info->wspecversion < 0x400) > + goto out; Isn't this version check superfluous? Only UFSHCI 4.0 controllers should support the extended IID feature. > + ext_ufs_feature = get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); The above change introduces a third instance of this code. Please introduce a helper function that does something like the following and replace the above line with a call to that helper function: if (hba->desc_size[QUERY_DESC_IDN_DEVICE] < DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4) return 0; return get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); > +out: > + dev_info->b_ext_iid_en = !!ext_iid_en; Please remove "!!". This conversion happens implicitly when assigning to a boolean variable. Thanks, Bart.
On Fri, Sep 30 2022 at 11:23 -0700, Bart Van Assche wrote: >On 9/22/22 18:05, Asutosh Das wrote: >>+ hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); > >What value is reported when reading the REG_MCQCAP register on an >UFSHCI 3.0 controller? -1 or 0? > It reads 0.
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index f4f8ded..4b9ae83 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -88,6 +88,7 @@ /* Polling time to wait for fDeviceInit */ #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */ +#define EXT_IID_CAP_SHIFT 10 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \ ({ \ int _ret; \ @@ -2239,6 +2240,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba) if (err) dev_err(hba->dev, "crypto setup failed\n"); + hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP); + hba->ext_iid_sup = (hba->mcq_capabilities & MASK_EXT_IID_SUPPORT) >> + EXT_IID_CAP_SHIFT; + return err; } @@ -7664,6 +7669,30 @@ static void ufshcd_temp_notif_probe(struct ufs_hba *hba, const u8 *desc_buf) } } +static void ufshcd_ext_iid_probe(struct ufs_hba *hba, u8 *desc_buf) +{ + struct ufs_dev_info *dev_info = &hba->dev_info; + u32 ext_ufs_feature; + u32 ext_iid_en = 0; + int err; + + if (dev_info->wspecversion < 0x400) + goto out; + + ext_ufs_feature = get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP); + + if (!(ext_ufs_feature & UFS_DEV_EXT_IID_SUP)) + goto out; + + err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR, + QUERY_ATTR_IDN_EXT_IID_EN, 0, 0, &ext_iid_en); + if (err) + dev_err(hba->dev, "failed reading bEXTIIDEn. err = %d\n", err); + +out: + dev_info->b_ext_iid_en = !!ext_iid_en; +} + void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, const struct ufs_dev_quirk *fixups) { @@ -7762,6 +7791,9 @@ static int ufs_get_device_desc(struct ufs_hba *hba) ufshcd_temp_notif_probe(hba, desc_buf); + if (hba->ext_iid_sup) + ufshcd_ext_iid_probe(hba, desc_buf); + /* * ufshcd_read_string_desc returns size of the string * reset the error value diff --git a/include/ufs/ufs.h b/include/ufs/ufs.h index 1bba3fe..ba2a1d8 100644 --- a/include/ufs/ufs.h +++ b/include/ufs/ufs.h @@ -165,6 +165,7 @@ enum attr_idn { QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D, QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E, QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F, + QUERY_ATTR_IDN_EXT_IID_EN = 0x2A, }; /* Descriptor idn for Query requests */ @@ -352,6 +353,7 @@ enum { UFS_DEV_EXT_TEMP_NOTIF = BIT(6), UFS_DEV_HPB_SUPPORT = BIT(7), UFS_DEV_WRITE_BOOSTER_SUP = BIT(8), + UFS_DEV_EXT_IID_SUP = BIT(16), }; #define UFS_DEV_HPB_SUPPORT_VERSION 0x310 @@ -601,6 +603,8 @@ struct ufs_dev_info { bool b_rpm_dev_flush_capable; u8 b_presrv_uspc_en; + /* UFS EXT_IID Enable */ + bool b_ext_iid_en; }; /* diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 7fe1a92..da1eb8a 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -737,6 +737,7 @@ struct ufs_hba_monitor { * @outstanding_lock: Protects @outstanding_reqs. * @outstanding_reqs: Bits representing outstanding transfer requests * @capabilities: UFS Controller Capabilities + * @mcq_capabilities: UFS Multi Command Queue capabilities * @nutrs: Transfer Request Queue depth supported by controller * @nutmrs: Task Management Queue depth supported by controller * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock. @@ -818,6 +819,7 @@ struct ufs_hba_monitor { * device * @complete_put: whether or not to call ufshcd_rpm_put() from inside * ufshcd_resume_complete() + * @ext_iid_sup: is EXT_IID is supported by UFSHC */ struct ufs_hba { void __iomem *mmio_base; @@ -859,6 +861,7 @@ struct ufs_hba { u32 capabilities; int nutrs; + u32 mcq_capabilities; int nutmrs; u32 reserved_slot; u32 ufs_version; @@ -965,6 +968,7 @@ struct ufs_hba { #endif u32 luns_avail; bool complete_put; + bool ext_iid_sup; }; /* Returns true if clocks can be gated. Otherwise false */ diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h index f81aa95..ef5c3a8 100644 --- a/include/ufs/ufshci.h +++ b/include/ufs/ufshci.h @@ -22,6 +22,7 @@ enum { /* UFSHCI Registers */ enum { REG_CONTROLLER_CAPABILITIES = 0x00, + REG_MCQCAP = 0x04, REG_UFS_VERSION = 0x08, REG_CONTROLLER_DEV_ID = 0x10, REG_CONTROLLER_PROD_ID = 0x14, @@ -68,6 +69,12 @@ enum { MASK_OUT_OF_ORDER_DATA_DELIVERY_SUPPORT = 0x02000000, MASK_UIC_DME_TEST_MODE_SUPPORT = 0x04000000, MASK_CRYPTO_SUPPORT = 0x10000000, + MASK_MCQ_SUPPORT = 0x40000000, +}; + +/* MCQ capability mask */ +enum { + MASK_EXT_IID_SUPPORT = 0x00000400, }; #define UFS_MASK(mask, offset) ((mask) << (offset))