| Message ID | 20221011231727.8090-7-bb@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | enable VTM node of all TI's K3 SoCs | expand |
On Tue, 11 Oct 2022 18:17:22 -0500, Bryan Brattlof wrote: > Only some of TI's J721E SoCs will need a eFuse register range mapped to > determine if they're affected by TI's i2128 erratum. All other SoC will > not need this eFuse range to be mapped to function properly > > Update the bindings for the k3_j72xx_bandgap thermal driver so other > devices will only need to define two register ranges > > Signed-off-by: Bryan Brattlof <bb@ti.com> > --- > .../bindings/thermal/ti,j72xx-thermal.yaml | 34 +++++++++++++------ > 1 file changed, 24 insertions(+), 10 deletions(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dtb: thermal-sensor@42040000: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On 11/10/2022 19:17, Bryan Brattlof wrote: > Only some of TI's J721E SoCs will need a eFuse register range mapped to > determine if they're affected by TI's i2128 erratum. All other SoC will > not need this eFuse range to be mapped to function properly > > Update the bindings for the k3_j72xx_bandgap thermal driver so other > devices will only need to define two register ranges > > Signed-off-by: Bryan Brattlof <bb@ti.com> > --- > .../bindings/thermal/ti,j72xx-thermal.yaml | 34 +++++++++++++------ > 1 file changed, 24 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > index 0b6a6fa07a532..387628ab35959 100644 > --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > @@ -33,16 +33,6 @@ properties: > - ti,j721e-vtm > - ti,j7200-vtm > > - reg: No, keep entire part here. with minItems:2 > - items: > - - description: VTM cfg1 register space > - - description: VTM cfg2 register space > - - description: | > - A software trimming method must be applied to some Jacinto > - devices to function properly. This eFuse region provides > - the information needed for these SoCs to report > - temperatures accurately. > - > power-domains: > description: | > Should contain the phandle to a power management (PM) domain > @@ -52,6 +42,30 @@ properties: > "#thermal-sensor-cells": > const: 1 > > +if: Put it under allOf. > + properties: > + compatible: > + contains: > + enum: > + - ti,j721e-vtm > +then: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space > + - description: | > + A software trimming method must be applied to some Jacinto > + devices to function properly. This eFuse region provides > + the information needed for these SoCs to report > + temperatures accurately. Instead: minItems: 3 > +else: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space Instead: maxItems: 2 > + > required: > - compatible > - reg Best regards, Krzysztof
On 11/10/2022 19:17, Bryan Brattlof wrote: > +then: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space > + - description: | > + A software trimming method must be applied to some Jacinto > + devices to function properly. This eFuse region provides > + the information needed for these SoCs to report > + temperatures accurately. > +else: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space > + BTW, you have additionalProperties:false, so how you coded it won't work. Test your bindings before sending. Best regards, Krzysztof
On October 12, 2022 thus sayeth Krzysztof Kozlowski: > On 11/10/2022 19:17, Bryan Brattlof wrote: > > Only some of TI's J721E SoCs will need a eFuse register range mapped to > > determine if they're affected by TI's i2128 erratum. All other SoC will > > not need this eFuse range to be mapped to function properly > > > > Update the bindings for the k3_j72xx_bandgap thermal driver so other > > devices will only need to define two register ranges > > > > Signed-off-by: Bryan Brattlof <bb@ti.com> > > --- > > .../bindings/thermal/ti,j72xx-thermal.yaml | 34 +++++++++++++------ > > 1 file changed, 24 insertions(+), 10 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > > index 0b6a6fa07a532..387628ab35959 100644 > > --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > > +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > > @@ -33,16 +33,6 @@ properties: > > - ti,j721e-vtm > > - ti,j7200-vtm > > > > - reg: > > No, keep entire part here. > with minItems:2 > Ah ok! I was unsure what this should look like. Your way is better :) Thanks Krzysztof ~Bryan
diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index 0b6a6fa07a532..387628ab35959 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -33,16 +33,6 @@ properties: - ti,j721e-vtm - ti,j7200-vtm - reg: - items: - - description: VTM cfg1 register space - - description: VTM cfg2 register space - - description: | - A software trimming method must be applied to some Jacinto - devices to function properly. This eFuse region provides - the information needed for these SoCs to report - temperatures accurately. - power-domains: description: | Should contain the phandle to a power management (PM) domain @@ -52,6 +42,30 @@ properties: "#thermal-sensor-cells": const: 1 +if: + properties: + compatible: + contains: + enum: + - ti,j721e-vtm +then: + properties: + reg: + items: + - description: VTM cfg1 register space + - description: VTM cfg2 register space + - description: | + A software trimming method must be applied to some Jacinto + devices to function properly. This eFuse region provides + the information needed for these SoCs to report + temperatures accurately. +else: + properties: + reg: + items: + - description: VTM cfg1 register space + - description: VTM cfg2 register space + required: - compatible - reg
Only some of TI's J721E SoCs will need a eFuse register range mapped to determine if they're affected by TI's i2128 erratum. All other SoC will not need this eFuse range to be mapped to function properly Update the bindings for the k3_j72xx_bandgap thermal driver so other devices will only need to define two register ranges Signed-off-by: Bryan Brattlof <bb@ti.com> --- .../bindings/thermal/ti,j72xx-thermal.yaml | 34 +++++++++++++------ 1 file changed, 24 insertions(+), 10 deletions(-)