Message ID | 20221014221011.7360-4-quic_molvera@quicinc.com (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | clk: qcom: Add clocks for the QDU1000 and QRU1000 SoCs | expand |
Quoting Melody Olvera (2022-10-14 15:10:08) > diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c > index f869fc6aaed6..b5dc1f4ef277 100644 > --- a/drivers/clk/qcom/clk-branch.c > +++ b/drivers/clk/qcom/clk-branch.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) 2013, The Linux Foundation. All rights reserved. > + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > #include <linux/kernel.h> > @@ -56,6 +57,10 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) > > if (enabling) { > val &= mask; > + > + if (br->halt_check == BRANCH_HALT_INVERT) > + return (val & BRANCH_CLK_OFF) == BRANCH_CLK_OFF; > + > return (val & BRANCH_CLK_OFF) == 0 || > val == BRANCH_NOC_FSM_STATUS_ON; > } else { > diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h > index 17a58119165e..4ac1debeb91e 100644 > --- a/drivers/clk/qcom/clk-branch.h > +++ b/drivers/clk/qcom/clk-branch.h > @@ -1,5 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 */ > /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */ > +/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ > > #ifndef __QCOM_CLK_BRANCH_H__ > #define __QCOM_CLK_BRANCH_H__ > @@ -33,6 +34,7 @@ struct clk_branch { > #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) > #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ > #define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ > +#define BRANCH_HALT_INVERT 4 /* Invert logic for halt bit */ How is it different from BRANCH_HALT vs. BRANCH_HALT_ENABLE?
On 10/14/2022 5:20 PM, Stephen Boyd wrote: > Quoting Melody Olvera (2022-10-14 15:10:08) >> diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c >> index f869fc6aaed6..b5dc1f4ef277 100644 >> --- a/drivers/clk/qcom/clk-branch.c >> +++ b/drivers/clk/qcom/clk-branch.c >> @@ -1,6 +1,7 @@ >> // SPDX-License-Identifier: GPL-2.0 >> /* >> * Copyright (c) 2013, The Linux Foundation. All rights reserved. >> + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. >> */ >> >> #include <linux/kernel.h> >> @@ -56,6 +57,10 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) >> >> if (enabling) { >> val &= mask; >> + >> + if (br->halt_check == BRANCH_HALT_INVERT) >> + return (val & BRANCH_CLK_OFF) == BRANCH_CLK_OFF; >> + >> return (val & BRANCH_CLK_OFF) == 0 || >> val == BRANCH_NOC_FSM_STATUS_ON; >> } else { >> diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h >> index 17a58119165e..4ac1debeb91e 100644 >> --- a/drivers/clk/qcom/clk-branch.h >> +++ b/drivers/clk/qcom/clk-branch.h >> @@ -1,5 +1,6 @@ >> /* SPDX-License-Identifier: GPL-2.0 */ >> /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */ >> +/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ >> >> #ifndef __QCOM_CLK_BRANCH_H__ >> #define __QCOM_CLK_BRANCH_H__ >> @@ -33,6 +34,7 @@ struct clk_branch { >> #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) >> #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ >> #define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ >> +#define BRANCH_HALT_INVERT 4 /* Invert logic for halt bit */ > How is it different from BRANCH_HALT vs. BRANCH_HALT_ENABLE? Main difference here is in how other parts of the register are checked to see if halting happened or not. Turns out the clocks that use this can be reconfigured to be a little more friendly to the code already submitted, so this patch isn't necessary. I'll drop it in the next PS. Thanks, Melody
diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index f869fc6aaed6..b5dc1f4ef277 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2013, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/kernel.h> @@ -56,6 +57,10 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) if (enabling) { val &= mask; + + if (br->halt_check == BRANCH_HALT_INVERT) + return (val & BRANCH_CLK_OFF) == BRANCH_CLK_OFF; + return (val & BRANCH_CLK_OFF) == 0 || val == BRANCH_NOC_FSM_STATUS_ON; } else { diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 17a58119165e..4ac1debeb91e 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __QCOM_CLK_BRANCH_H__ #define __QCOM_CLK_BRANCH_H__ @@ -33,6 +34,7 @@ struct clk_branch { #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ #define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ +#define BRANCH_HALT_INVERT 4 /* Invert logic for halt bit */ struct clk_regmap clkr; };