diff mbox series

arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency

Message ID 20221019-upstream-puma-sd-40mhz-v1-0-754a76421518@theobroma-systems.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency | expand

Commit Message

Quentin Schulz Oct. 19, 2022, 2:27 p.m. UTC
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>

From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>

CRC errors (code -84 EILSEQ) have been observed for some SanDisk
Ultra A1 cards when running at 50MHz.

Waveform analysis suggest that the level shifters that are used on the
RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't
handle clock rates at or above 48MHz properly. Back off to 40MHz for
some safety margin.

Cc: stable@vger.kernel.org
Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM")
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
We've been carrying this patch downstream for years and completely forgot to
upstream it. This is now done.

To: Rob Herring <robh+dt@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


---
base-commit: aae703b02f92bde9264366c545e87cec451de471
change-id: 20221019-upstream-puma-sd-40mhz-b5aef1c351e6

Best regards,

Comments

Greg Kroah-Hartman Oct. 19, 2022, 2:56 p.m. UTC | #1
On Wed, Oct 19, 2022 at 04:27:27PM +0200, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> 
> From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>

You can not have 2 authors :(

> 
> CRC errors (code -84 EILSEQ) have been observed for some SanDisk
> Ultra A1 cards when running at 50MHz.
> 
> Waveform analysis suggest that the level shifters that are used on the
> RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't
> handle clock rates at or above 48MHz properly. Back off to 40MHz for
> some safety margin.
> 
> Cc: stable@vger.kernel.org
> Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM")
> Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> ---
> We've been carrying this patch downstream for years and completely forgot to
> upstream it. This is now done.

It has to be accepted before you are done :)

thanks,

greg k-h
Quentin Schulz Oct. 19, 2022, 3:59 p.m. UTC | #2
Hi Greg,

On 10/19/22 4:56 PM, Greg KH <gregkh@linuxfoundation.org> wrote:
> On Wed, Oct 19, 2022 at 04:27:27PM +0200, Quentin Schulz wrote:
> > From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> >
> > From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
> 
> You can not have 2 authors :(
> 

That's a bug in b4 and my patch submission/mail sending workflow, I'll sort something out with the b4 community and send a new version of the patch soon. Thanks for the heads up!

[...]

> It has to be accepted before you are done :)
> 

A "small" detail :)

Cheers,
Quentin
Heiko Stuebner Oct. 19, 2022, 5:15 p.m. UTC | #3
Hi Quentin,

Am Mittwoch, 19. Oktober 2022, 17:59:54 CEST schrieb quentin.schulz@theobroma-systems.com:
> Hi Greg,
> 
> On 10/19/22 4:56 PM, Greg KH <gregkh@linuxfoundation.org> wrote:
> > On Wed, Oct 19, 2022 at 04:27:27PM +0200, Quentin Schulz wrote:
> > > From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> > >
> > > From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
> > 
> > You can not have 2 authors :(
> > 
> 
> That's a bug in b4 and my patch submission/mail sending workflow, I'll sort something out with the b4 community and send a new version of the patch soon. Thanks for the heads up!

I guess, Jakob is the original author?
If so, I can simply drop your authorship.


Heiko

> 
> [...]
> 
> > It has to be accepted before you are done :)
> > 
> 
> A "small" detail :)
> 
> Cheers,
> Quentin
>
Quentin Schulz Oct. 20, 2022, 8:32 a.m. UTC | #4
Hi Heiko,

On 10/19/22 19:15, Heiko Stuebner wrote:
> Hi Quentin,
> 
> Am Mittwoch, 19. Oktober 2022, 17:59:54 CEST schrieb quentin.schulz@theobroma-systems.com:
>> Hi Greg,
>>
>> On 10/19/22 4:56 PM, Greg KH <gregkh@linuxfoundation.org> wrote:
>>> On Wed, Oct 19, 2022 at 04:27:27PM +0200, Quentin Schulz wrote:
>>>> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
>>>>
>>>> From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
>>>
>>> You can not have 2 authors :(
>>>
>>
>> That's a bug in b4 and my patch submission/mail sending workflow, I'll sort something out with the b4 community and send a new version of the patch soon. Thanks for the heads up!
> 
> I guess, Jakob is the original author?

Correct.

> If so, I can simply drop your authorship.
> 

Up to you, don't want to increase maintainer's burden. I'll send a v2 
Monday if you haven't sent the usual "Applied thanks" mail by then :) 
(or if there's feedback of course).

Will work on fixing my workflow/tools til then.

Cheers,
Quentin

> 
> Heiko
> 
>>
>> [...]
>>
>>> It has to be accepted before you are done :)
>>>
>>
>> A "small" detail :)
>>
>> Cheers,
>> Quentin
>>
> 
> 
> 
>
Heiko Stuebner Oct. 20, 2022, 9:49 a.m. UTC | #5
On Wed, 19 Oct 2022 16:27:27 +0200, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> 
> From: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
> 
> CRC errors (code -84 EILSEQ) have been observed for some SanDisk
> Ultra A1 cards when running at 50MHz.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency
      commit: 91e8b74fe6381e083f8aa55217bb0562785ab398

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
index 04c752f49be9..115c14c0a3c6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
@@ -207,7 +207,7 @@  &sdmmc {
 	cap-sd-highspeed;
 	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
 	disable-wp;
-	max-frequency = <150000000>;
+	max-frequency = <40000000>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 	vmmc-supply = <&vcc3v3_baseboard>;