diff mbox series

[v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value

Message ID 20221024175008.196714-1-rajat.khandelwal@linux.intel.com (mailing list archive)
State Changes Requested
Headers show
Series [v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value | expand

Commit Message

Rajat Khandelwal Oct. 24, 2022, 5:50 p.m. UTC
The datasheet states that the slave address for the device is 0x20
when the pins A0 and A1 are ground. The DT binding has been using
0x10 as the value and I think it should be 0x20 as per datasheet.

Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com>
---

v3:
1. Subject prefix added
2. Improvised 'examples:'

 Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski Oct. 23, 2022, 11:23 p.m. UTC | #1
On 24/10/2022 13:50, Rajat Khandelwal wrote:
> The datasheet states that the slave address for the device is 0x20
> when the pins A0 and A1 are ground. The DT binding has been using
> 0x10 as the value and I think it should be 0x20 as per datasheet.
> 
> Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Jonathan Cameron Oct. 29, 2022, 12:25 p.m. UTC | #2
On Sun, 23 Oct 2022 19:23:09 -0400
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> On 24/10/2022 13:50, Rajat Khandelwal wrote:
> > The datasheet states that the slave address for the device is 0x20
> > when the pins A0 and A1 are ground. The DT binding has been using
> > 0x10 as the value and I think it should be 0x20 as per datasheet.
> > 
> > Signed-off-by: Rajat Khandelwal <rajat.khandelwal@linux.intel.com>
> > ---  
> 
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 

hmm. This is curious. So the datasheet indeed provides a table saying
grounding both pins sets the address to 0x20, however take a look at
Figure 2 which says the address is
A1 | A0 | 1 | 0 | 0 | 0 | 0

or 0x10 as per the example.  My guess is someone forgot that i2c addresses
are 7 bits and the lowest bit of the first byte is used for R/W control.

So unless we have this verified on hardware (implying that the address table
is correct in this sense) I'm not keen to take this.
I doubt that is the case given it has 8 bit addresses (0xe0) and i2c addresses
are 7 bits.

Jonathan


> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml b/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml
index 264fa7c5fe3a..e7c7c103d1dd 100644
--- a/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml
+++ b/Documentation/devicetree/bindings/iio/dac/maxim,ds4424.yaml
@@ -36,9 +36,9 @@  examples:
         #address-cells = <1>;
         #size-cells = <0>;
 
-        dac@10 {
+        dac@20 {
             compatible = "maxim,ds4424";
-            reg = <0x10>; /* When A0, A1 pins are ground */
+            reg = <0x20>; /* When A0, A1 pins are ground */
             vcc-supply = <&vcc_3v3>;
         };
     };