diff mbox series

[v2] cxl: check decoder count for end device

Message ID 166662591658.231711.18305612334545370247.stgit@djiang5-desk3.ch.intel.com
State Superseded
Headers show
Series [v2] cxl: check decoder count for end device | expand

Commit Message

Dave Jiang Oct. 24, 2022, 3:39 p.m. UTC
CXL spec rev3.0 8.2.4.19.1 added definition for up to 32 decoders. It also
indicates that for devices, only 10 decoders should be advertised. Add
check on number of decoders greater than 10 for devices and reset to 10 to
force spec compliance.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---

v2:
- Remove decoder count reassignment from violation (Dan)

 drivers/cxl/core/hdm.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Dave Jiang Oct. 24, 2022, 3:40 p.m. UTC | #1
On 10/24/2022 8:39 AM, Dave Jiang wrote:
> CXL spec rev3.0 8.2.4.19.1 added definition for up to 32 decoders. It also
> indicates that for devices, only 10 decoders should be advertised. Add
> check on number of decoders greater than 10 for devices and reset to 10 to
> force spec compliance.
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>


Please ignore. Need to fix the warning.


> ---
>
> v2:
> - Remove decoder count reassignment from violation (Dan)
>
>   drivers/cxl/core/hdm.c |   10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index d1d2caea5c62..ff53c758e95a 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -71,9 +71,19 @@ EXPORT_SYMBOL_NS_GPL(devm_cxl_add_passthrough_decoder, CXL);
>   static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm)
>   {
>   	u32 hdm_cap;
> +	struct device *dev = &cxlhdm->port->dev;
>   
>   	hdm_cap = readl(cxlhdm->regs.hdm_decoder + CXL_HDM_DECODER_CAP_OFFSET);
>   	cxlhdm->decoder_count = cxl_hdm_decoder_count(hdm_cap);
> +	/*
> +	 * CXL spec rev3.0 8.2.4.19.1 indicates CXL devices shall not advertise
> +	 * more than 10 decoders. Switches and Host Bridges may advertise up to
> +	 * 32 decoders. Set the decoders to 10 for devices if more than 10 are
> +	 * found.
> +	 */
> +	if (is_cxl_endpoint(cxlhdm->port) && cxlhdm->decoder_count > 10)
> +		dev_warn(dev, "Reset decoders count (%d) to 10, spec violation!\n",
> +			 cxlhdm->decoder_count);
>   	cxlhdm->target_count =
>   		FIELD_GET(CXL_HDM_DECODER_TARGET_COUNT_MASK, hdm_cap);
>   	if (FIELD_GET(CXL_HDM_DECODER_INTERLEAVE_11_8, hdm_cap))
>
>
diff mbox series

Patch

diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index d1d2caea5c62..ff53c758e95a 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -71,9 +71,19 @@  EXPORT_SYMBOL_NS_GPL(devm_cxl_add_passthrough_decoder, CXL);
 static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm)
 {
 	u32 hdm_cap;
+	struct device *dev = &cxlhdm->port->dev;
 
 	hdm_cap = readl(cxlhdm->regs.hdm_decoder + CXL_HDM_DECODER_CAP_OFFSET);
 	cxlhdm->decoder_count = cxl_hdm_decoder_count(hdm_cap);
+	/*
+	 * CXL spec rev3.0 8.2.4.19.1 indicates CXL devices shall not advertise
+	 * more than 10 decoders. Switches and Host Bridges may advertise up to
+	 * 32 decoders. Set the decoders to 10 for devices if more than 10 are
+	 * found.
+	 */
+	if (is_cxl_endpoint(cxlhdm->port) && cxlhdm->decoder_count > 10)
+		dev_warn(dev, "Reset decoders count (%d) to 10, spec violation!\n",
+			 cxlhdm->decoder_count);
 	cxlhdm->target_count =
 		FIELD_GET(CXL_HDM_DECODER_TARGET_COUNT_MASK, hdm_cap);
 	if (FIELD_GET(CXL_HDM_DECODER_INTERLEAVE_11_8, hdm_cap))