diff mbox series

[2/2] ASoC: codecs: va-macro: add npl clk

Message ID 20221115105541.16322-3-srinivas.kandagatla@linaro.org (mailing list archive)
State Superseded
Headers show
Series ASoC: codec: lpass-va: add npl clock support | expand

Commit Message

Srinivas Kandagatla Nov. 15, 2022, 10:55 a.m. UTC 
New versions of VA Macro has soundwire integrated, so handle the soundwire npl
clock correctly in the codec driver.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 sound/soc/codecs/lpass-va-macro.c | 41 +++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

Comments

Krzysztof Kozlowski Nov. 15, 2022, 2:23 p.m. UTC | #1 
On 15/11/2022 11:55, Srinivas Kandagatla wrote:
> New versions of VA Macro has soundwire integrated, so handle the soundwire npl
> clock correctly in the codec driver.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  sound/soc/codecs/lpass-va-macro.c | 41 +++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
> index b0b6cf29cba3..d59af6d69c34 100644
> --- a/sound/soc/codecs/lpass-va-macro.c
> +++ b/sound/soc/codecs/lpass-va-macro.c
> @@ -205,6 +205,7 @@ struct va_macro {
>  	int dec_mode[VA_MACRO_NUM_DECIMATORS];
>  	struct regmap *regmap;
>  	struct clk *mclk;
> +	struct clk *npl;
>  	struct clk *macro;
>  	struct clk *dcodec;
>  	struct clk *fsgen;
> @@ -1332,6 +1333,9 @@ static int fsgen_gate_enable(struct clk_hw *hw)
>  	struct regmap *regmap = va->regmap;
>  	int ret;
>  
> +	if (va->has_swr_master)
> +		clk_prepare_enable(va->mclk);

No error path?

> +
>  	ret = va_macro_mclk_enable(va, true);
>  	if (!va->has_swr_master)
>  		return ret;
> @@ -1358,6 +1362,8 @@ static void fsgen_gate_disable(struct clk_hw *hw)
>  			   CDC_VA_SWR_CLK_EN_MASK, 0x0);
>  
>  	va_macro_mclk_enable(va, false);
> +	if (va->has_swr_master)
> +		clk_disable_unprepare(va->mclk);
>  }
>  
>  static int fsgen_gate_is_enabled(struct clk_hw *hw)
> @@ -1386,6 +1392,9 @@ static int va_macro_register_fsgen_output(struct va_macro *va)
>  	struct clk_init_data init;
>  	int ret;
>  
> +	if (va->has_swr_master)
> +		parent = va->npl;
> +
>  	parent_clk_name = __clk_get_name(parent);
>  
>  	of_property_read_string(np, "clock-output-names", &clk_name);
> @@ -1512,6 +1521,14 @@ static int va_macro_probe(struct platform_device *pdev)
>  	/* mclk rate */
>  	clk_set_rate(va->mclk, 2 * VA_MACRO_MCLK_FREQ);
>  
> +	if (va->has_swr_master) {
> +		va->npl = devm_clk_get(dev, "npl");

I think you miss:
ret = PTR_ERR(va->npl);

> +		if (IS_ERR(va->npl))
> +			goto err;
> +
> +		clk_set_rate(va->npl, 2 * VA_MACRO_MCLK_FREQ);
> +	}
> +
>  	ret = clk_prepare_enable(va->macro);
>  	if (ret)
>  		goto err;

Best regards,
Krzysztof
Srinivas Kandagatla Nov. 18, 2022, 7:02 a.m. UTC | #2 
Thanks Krzysztof,

On 15/11/2022 14:23, Krzysztof Kozlowski wrote:
> On 15/11/2022 11:55, Srinivas Kandagatla wrote:
>> New versions of VA Macro has soundwire integrated, so handle the soundwire npl
>> clock correctly in the codec driver.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>>   sound/soc/codecs/lpass-va-macro.c | 41 +++++++++++++++++++++++++++++++
>>   1 file changed, 41 insertions(+)
>>
>> diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
>> index b0b6cf29cba3..d59af6d69c34 100644
>> --- a/sound/soc/codecs/lpass-va-macro.c
>> +++ b/sound/soc/codecs/lpass-va-macro.c
>> @@ -205,6 +205,7 @@ struct va_macro {
>>   	int dec_mode[VA_MACRO_NUM_DECIMATORS];
>>   	struct regmap *regmap;
>>   	struct clk *mclk;
>> +	struct clk *npl;
>>   	struct clk *macro;
>>   	struct clk *dcodec;
>>   	struct clk *fsgen;
>> @@ -1332,6 +1333,9 @@ static int fsgen_gate_enable(struct clk_hw *hw)
>>   	struct regmap *regmap = va->regmap;
>>   	int ret;
>>   
>> +	if (va->has_swr_master)
>> +		clk_prepare_enable(va->mclk);
> 
> No error path?
that is true, i missed this indeed, sending v2 with this and other ret = 
PTR_ERR(va->npl) change.

--srini
> 
>> +
>>   	ret = va_macro_mclk_enable(va, true);
>>   	if (!va->has_swr_master)
>>   		return ret;
>> @@ -1358,6 +1362,8 @@ static void fsgen_gate_disable(struct clk_hw *hw)
>>   			   CDC_VA_SWR_CLK_EN_MASK, 0x0);
>>   
>>   	va_macro_mclk_enable(va, false);
>> +	if (va->has_swr_master)
>> +		clk_disable_unprepare(va->mclk);
>>   }
>>   
>>   static int fsgen_gate_is_enabled(struct clk_hw *hw)
>> @@ -1386,6 +1392,9 @@ static int va_macro_register_fsgen_output(struct va_macro *va)
>>   	struct clk_init_data init;
>>   	int ret;
>>   
>> +	if (va->has_swr_master)
>> +		parent = va->npl;
>> +
>>   	parent_clk_name = __clk_get_name(parent);
>>   
>>   	of_property_read_string(np, "clock-output-names", &clk_name);
>> @@ -1512,6 +1521,14 @@ static int va_macro_probe(struct platform_device *pdev)
>>   	/* mclk rate */
>>   	clk_set_rate(va->mclk, 2 * VA_MACRO_MCLK_FREQ);
>>   
>> +	if (va->has_swr_master) {
>> +		va->npl = devm_clk_get(dev, "npl");
> 
> I think you miss:
> ret = PTR_ERR(va->npl);
> 
>> +		if (IS_ERR(va->npl))
>> +			goto err;
>> +
>> +		clk_set_rate(va->npl, 2 * VA_MACRO_MCLK_FREQ);
>> +	}
>> +
>>   	ret = clk_prepare_enable(va->macro);
>>   	if (ret)
>>   		goto err;
> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c
index b0b6cf29cba3..d59af6d69c34 100644
--- a/sound/soc/codecs/lpass-va-macro.c
+++ b/sound/soc/codecs/lpass-va-macro.c
@@ -205,6 +205,7 @@  struct va_macro {
 	int dec_mode[VA_MACRO_NUM_DECIMATORS];
 	struct regmap *regmap;
 	struct clk *mclk;
+	struct clk *npl;
 	struct clk *macro;
 	struct clk *dcodec;
 	struct clk *fsgen;
@@ -1332,6 +1333,9 @@  static int fsgen_gate_enable(struct clk_hw *hw)
 	struct regmap *regmap = va->regmap;
 	int ret;
 
+	if (va->has_swr_master)
+		clk_prepare_enable(va->mclk);
+
 	ret = va_macro_mclk_enable(va, true);
 	if (!va->has_swr_master)
 		return ret;
@@ -1358,6 +1362,8 @@  static void fsgen_gate_disable(struct clk_hw *hw)
 			   CDC_VA_SWR_CLK_EN_MASK, 0x0);
 
 	va_macro_mclk_enable(va, false);
+	if (va->has_swr_master)
+		clk_disable_unprepare(va->mclk);
 }
 
 static int fsgen_gate_is_enabled(struct clk_hw *hw)
@@ -1386,6 +1392,9 @@  static int va_macro_register_fsgen_output(struct va_macro *va)
 	struct clk_init_data init;
 	int ret;
 
+	if (va->has_swr_master)
+		parent = va->npl;
+
 	parent_clk_name = __clk_get_name(parent);
 
 	of_property_read_string(np, "clock-output-names", &clk_name);
@@ -1512,6 +1521,14 @@  static int va_macro_probe(struct platform_device *pdev)
 	/* mclk rate */
 	clk_set_rate(va->mclk, 2 * VA_MACRO_MCLK_FREQ);
 
+	if (va->has_swr_master) {
+		va->npl = devm_clk_get(dev, "npl");
+		if (IS_ERR(va->npl))
+			goto err;
+
+		clk_set_rate(va->npl, 2 * VA_MACRO_MCLK_FREQ);
+	}
+
 	ret = clk_prepare_enable(va->macro);
 	if (ret)
 		goto err;
@@ -1524,6 +1541,12 @@  static int va_macro_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_mclk;
 
+	if (va->has_swr_master) {
+		ret = clk_prepare_enable(va->npl);
+		if (ret)
+			goto err_npl;
+	}
+
 	ret = va_macro_register_fsgen_output(va);
 	if (ret)
 		goto err_clkout;
@@ -1563,6 +1586,9 @@  static int va_macro_probe(struct platform_device *pdev)
 	return 0;
 
 err_clkout:
+	if (va->has_swr_master)
+		clk_disable_unprepare(va->npl);
+err_npl:
 	clk_disable_unprepare(va->mclk);
 err_mclk:
 	clk_disable_unprepare(va->dcodec);
@@ -1578,6 +1604,9 @@  static int va_macro_remove(struct platform_device *pdev)
 {
 	struct va_macro *va = dev_get_drvdata(&pdev->dev);
 
+	if (va->has_swr_master)
+		clk_disable_unprepare(va->npl);
+
 	clk_disable_unprepare(va->mclk);
 	clk_disable_unprepare(va->dcodec);
 	clk_disable_unprepare(va->macro);
@@ -1594,6 +1623,9 @@  static int __maybe_unused va_macro_runtime_suspend(struct device *dev)
 	regcache_cache_only(va->regmap, true);
 	regcache_mark_dirty(va->regmap);
 
+	if (va->has_swr_master)
+		clk_disable_unprepare(va->npl);
+
 	clk_disable_unprepare(va->mclk);
 
 	return 0;
@@ -1610,6 +1642,15 @@  static int __maybe_unused va_macro_runtime_resume(struct device *dev)
 		return ret;
 	}
 
+	if (va->has_swr_master) {
+		ret = clk_prepare_enable(va->npl);
+		if (ret) {
+			clk_disable_unprepare(va->mclk);
+			dev_err(va->dev, "unable to prepare npl\n");
+			return ret;
+		}
+	}
+
 	regcache_cache_only(va->regmap, false);
 	regcache_sync(va->regmap);