diff mbox series

[v2,1/3] dt-bindings: spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU)

Message ID 20221124191400.287918-2-j.neuschaefer@gmx.net (mailing list archive)
State Accepted
Commit dd71cd4dd6c9bede8ee8277d650fcb9c1b12702c
Headers show
Series Nuvoton WPCM450 FIU SPI flash controller | expand

Commit Message

J. Neuschäfer Nov. 24, 2022, 7:13 p.m. UTC
The Flash Interface Unit (FIU) is the SPI flash controller in the
Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
(memory-mapped) access to 16 MiB per chip. Larger flash chips can be
accessed by software-defined SPI transfers.

The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---

v2:
- A few cleanups suggested by Krzysztof Kozlowski
- Simplify binding by making second reg item mandatory

v1:
- https://lore.kernel.org/lkml/20221105185911.1547847-4-j.neuschaefer@gmx.net/
---
 .../bindings/spi/nuvoton,wpcm450-fiu.yaml     | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml

--
2.35.1

Comments

Krzysztof Kozlowski Nov. 25, 2022, 8:33 a.m. UTC | #1
On 24/11/2022 20:13, Jonathan Neuschäfer wrote:
> The Flash Interface Unit (FIU) is the SPI flash controller in the
> Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
> (memory-mapped) access to 16 MiB per chip. Larger flash chips can be
> accessed by software-defined SPI transfers.
> 
> The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU.
> 
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> ---
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Mark Brown Nov. 25, 2022, 1:13 p.m. UTC | #2
On Thu, Nov 24, 2022 at 08:13:58PM +0100, Jonathan Neuschäfer wrote:
> The Flash Interface Unit (FIU) is the SPI flash controller in the
> Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
> (memory-mapped) access to 16 MiB per chip. Larger flash chips can be
> accessed by software-defined SPI transfers.

You didn't send me the cover letter for this series.  As documented in
submitting-patches.rst please send things to the maintainers for the
code you would like to change.  The normal kernel workflow is that
people apply patches from their inboxes, if they aren't copied they are
likely to not see the patch at all and it is much more difficult to
apply patches.
J. Neuschäfer Nov. 25, 2022, 2:33 p.m. UTC | #3
On Fri, Nov 25, 2022 at 01:13:29PM +0000, Mark Brown wrote:
> On Thu, Nov 24, 2022 at 08:13:58PM +0100, Jonathan Neuschäfer wrote:
> > The Flash Interface Unit (FIU) is the SPI flash controller in the
> > Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
> > (memory-mapped) access to 16 MiB per chip. Larger flash chips can be
> > accessed by software-defined SPI transfers.
> 
> You didn't send me the cover letter for this series.  As documented in
> submitting-patches.rst please send things to the maintainers for the
> code you would like to change.  The normal kernel workflow is that
> people apply patches from their inboxes, if they aren't copied they are
> likely to not see the patch at all and it is much more difficult to
> apply patches.

Ah, sorry. I wrongly associated you with a different subsystem (I think
MFD), which became irrelevant for this iteration of the patchset,
rather than SPI.

Here's the relevant/new part of the cover letter, for your convenience:

Changelog for v2:

- Dropped the patches which have been applied in the meantime, leaving
  only three out of eight
- Changed the binding to require both items in the reg property, because
  there is no need to keep the second item optional, suggested by
  Krzysztof Kozlowski
- Various other cleanups suggested by Krzysztof Kozlowski and the kernel
  test robot



Jonathan
Rob Herring Nov. 26, 2022, 10:25 p.m. UTC | #4
On Thu, 24 Nov 2022 20:13:58 +0100, Jonathan Neuschäfer wrote:
> The Flash Interface Unit (FIU) is the SPI flash controller in the
> Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
> (memory-mapped) access to 16 MiB per chip. Larger flash chips can be
> accessed by software-defined SPI transfers.
> 
> The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU.
> 
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> ---
> 
> v2:
> - A few cleanups suggested by Krzysztof Kozlowski
> - Simplify binding by making second reg item mandatory
> 
> v1:
> - https://lore.kernel.org/lkml/20221105185911.1547847-4-j.neuschaefer@gmx.net/
> ---
>  .../bindings/spi/nuvoton,wpcm450-fiu.yaml     | 66 +++++++++++++++++++
>  1 file changed, 66 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dts:18:18: fatal error: dt-bindings/clock/nuvoton,wpcm450-clk.h: No such file or directory
   18 |         #include <dt-bindings/clock/nuvoton,wpcm450-clk.h>
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1492: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221124191400.287918-2-j.neuschaefer@gmx.net

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command.
Conor Dooley Nov. 28, 2022, 11:05 a.m. UTC | #5
On Sat, Nov 26, 2022 at 04:25:36PM -0600, Rob Herring wrote:
> 
> On Thu, 24 Nov 2022 20:13:58 +0100, Jonathan Neuschäfer wrote:
> > The Flash Interface Unit (FIU) is the SPI flash controller in the
> > Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
> > (memory-mapped) access to 16 MiB per chip. Larger flash chips can be
> > accessed by software-defined SPI transfers.
> > 
> > The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU.
> > 
> > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> > ---
> > 
> > v2:
> > - A few cleanups suggested by Krzysztof Kozlowski
> > - Simplify binding by making second reg item mandatory
> > 
> > v1:
> > - https://lore.kernel.org/lkml/20221105185911.1547847-4-j.neuschaefer@gmx.net/
> > ---
> >  .../bindings/spi/nuvoton,wpcm450-fiu.yaml     | 66 +++++++++++++++++++
> >  1 file changed, 66 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml
> > 
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dts:18:18: fatal error: dt-bindings/clock/nuvoton,wpcm450-clk.h: No such file or directory
>    18 |         #include <dt-bindings/clock/nuvoton,wpcm450-clk.h>
>       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> compilation terminated.
> make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dtb] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1492: dt_binding_check] Error 2

FWIW this seems to now be in linux-next as dd71cd4dd6c9 ("spi: Add Nuvoton
WPCM450 Flash Interface Unit (FIU) bindings") & is breaking
dt_binding_check.

Thanks,
Conor.
J. Neuschäfer Nov. 28, 2022, 1:58 p.m. UTC | #6
On Mon, Nov 28, 2022 at 11:05:31AM +0000, Conor Dooley wrote:
> On Sat, Nov 26, 2022 at 04:25:36PM -0600, Rob Herring wrote:
[...]
> > dtschema/dtc warnings/errors:
> > Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dts:18:18: fatal error: dt-bindings/clock/nuvoton,wpcm450-clk.h: No such file or directory
> >    18 |         #include <dt-bindings/clock/nuvoton,wpcm450-clk.h>
> >       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > compilation terminated.
> > make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dtb] Error 1
> > make[1]: *** Waiting for unfinished jobs....
> > make: *** [Makefile:1492: dt_binding_check] Error 2
> 
> FWIW this seems to now be in linux-next as dd71cd4dd6c9 ("spi: Add Nuvoton
> WPCM450 Flash Interface Unit (FIU) bindings") & is breaking
> dt_binding_check.

Ah, sorry about that. It should resolve itself once nuvoton,wpcm450-clk
binding gets merged, but I don't see a definite timeframe for that, yet.

Alternatively, I can send a patch to simplify the example in the FIU
binding.

Jonathan
Conor Dooley Nov. 28, 2022, 2:09 p.m. UTC | #7
On Mon, Nov 28, 2022 at 02:58:57PM +0100, Jonathan Neuschäfer wrote:
> On Mon, Nov 28, 2022 at 11:05:31AM +0000, Conor Dooley wrote:
> > On Sat, Nov 26, 2022 at 04:25:36PM -0600, Rob Herring wrote:
> [...]
> > > dtschema/dtc warnings/errors:
> > > Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dts:18:18: fatal error: dt-bindings/clock/nuvoton,wpcm450-clk.h: No such file or directory
> > >    18 |         #include <dt-bindings/clock/nuvoton,wpcm450-clk.h>
> > >       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > compilation terminated.
> > > make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.example.dtb] Error 1
> > > make[1]: *** Waiting for unfinished jobs....
> > > make: *** [Makefile:1492: dt_binding_check] Error 2
> > 
> > FWIW this seems to now be in linux-next as dd71cd4dd6c9 ("spi: Add Nuvoton
> > WPCM450 Flash Interface Unit (FIU) bindings") & is breaking
> > dt_binding_check.
> 
> Ah, sorry about that. It should resolve itself once nuvoton,wpcm450-clk
> binding gets merged, but I don't see a definite timeframe for that, yet.
> 
> Alternatively, I can send a patch to simplify the example in the FIU
> binding.

Without being a Responsible Adult^TM for either SPI or DT, my preference
would be for simplifying the binding so that if your clk stuff doesn't
land for 6.2 the binding checks still work.
Mark Brown Nov. 28, 2022, 5:57 p.m. UTC | #8
On Mon, Nov 28, 2022 at 02:09:37PM +0000, Conor Dooley wrote:

> Without being a Responsible Adult^TM for either SPI or DT, my preference
> would be for simplifying the binding so that if your clk stuff doesn't
> land for 6.2 the binding checks still work.

Yes, please simplify the example.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml
new file mode 100644
index 0000000000000..ef94803e75d90
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml
@@ -0,0 +1,66 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nuvoton,wpcm450-fiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton WPCM450 Flash Interface Unit (FIU)
+
+maintainers:
+  - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+
+allOf:
+  - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+  compatible:
+    const: nuvoton,wpcm450-fiu
+
+  reg:
+    items:
+      - description: FIU registers
+      - description: Memory-mapped flash contents
+
+  reg-names:
+    items:
+      - const: control
+      - const: memory
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  nuvoton,shm:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: a phandle to the SHM block (see ../arm/nuvoton,shm.yaml)
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/nuvoton,wpcm450-clk.h>
+    spi@c8000000 {
+      compatible = "nuvoton,wpcm450-fiu";
+      reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+      reg-names = "control", "memory";
+      clocks = <&clk WPCM450_CLK_FIU>;
+      nuvoton,shm = <&shm>;
+
+      flash@0 {
+        compatible = "jedec,spi-nor";
+      };
+    };
+
+    shm: syscon@c8001000 {
+      compatible = "nuvoton,wpcm450-shm", "syscon";
+      reg = <0xc8001000 0x1000>;
+    };