| Message ID | 20221128101922.217217-3-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add DSC fractional bpp support | expand |
Hi Ankit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Ankit-Nautiyal/Add-DSC-fractional-bpp-support/20221128-182139
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link: https://lore.kernel.org/r/20221128101922.217217-3-ankit.k.nautiyal%40intel.com
patch subject: [Intel-gfx] [PATCH 02/11] drm/display/dp: Add helper function to get DSC bpp prescision
config: x86_64-allmodconfig
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/f2284323c8d5ced115fe358e76bb7955dfaea22c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ankit-Nautiyal/Add-DSC-fractional-bpp-support/20221128-182139
git checkout f2284323c8d5ced115fe358e76bb7955dfaea22c
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/display/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/display/drm_dp_helper.c: In function 'drm_dp_dsc_sink_bpp_incr':
>> drivers/gpu/drm/display/drm_dp_helper.c:2334:41: warning: array subscript 15 is outside array bounds of 'const u8[15]' {aka 'const unsigned char[15]'} [-Warray-bounds]
2334 | u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT];
| ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/display/drm_dp_helper.c:2332:38: note: while referencing 'dsc_dpcd'
2332 | u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
| ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +2334 drivers/gpu/drm/display/drm_dp_helper.c
2325
2326 /**
2327 * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
2328 * @dsc_dpcd: DSC capabilities from DPCD
2329 *
2330 * Returns the bpp precision supported by the DP sink.
2331 */
2332 u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
2333 {
> 2334 u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT];
2335
2336 switch (bpp_increment_dpcd) {
2337 case DP_DSC_BITS_PER_PIXEL_1_16:
2338 return 16;
2339 case DP_DSC_BITS_PER_PIXEL_1_8:
2340 return 8;
2341 case DP_DSC_BITS_PER_PIXEL_1_4:
2342 return 4;
2343 case DP_DSC_BITS_PER_PIXEL_1_2:
2344 return 2;
2345 case DP_DSC_BITS_PER_PIXEL_1:
2346 return 1;
2347 }
2348
2349 return 0;
2350 }
2351 EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr);
2352
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index 16565a0a5da6..3b3e89e46f1c 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, } EXPORT_SYMBOL(drm_dp_read_desc); +/** + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment + * @dsc_dpcd: DSC capabilities from DPCD + * + * Returns the bpp precision supported by the DP sink. + */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) +{ + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; + + switch (bpp_increment_dpcd) { + case DP_DSC_BITS_PER_PIXEL_1_16: + return 16; + case DP_DSC_BITS_PER_PIXEL_1_8: + return 8; + case DP_DSC_BITS_PER_PIXEL_1_4: + return 4; + case DP_DSC_BITS_PER_PIXEL_1_2: + return 2; + case DP_DSC_BITS_PER_PIXEL_1: + return 1; + } + + return 0; +} +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); + /** * drm_dp_dsc_sink_max_slice_count() - Get the max slice count * supported by the DSC sink. diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h index ab55453f2d2c..0a0306b2e829 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) } /* DP/eDP DSC support */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp); u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
Add helper to get the DSC bits_per_pixel precision for the DP sink. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/display/drm_dp_helper.c | 27 +++++++++++++++++++++++++ include/drm/display/drm_dp_helper.h | 1 + 2 files changed, 28 insertions(+)