Message ID | 1590488522-9292-1-git-send-email-haibo.chen@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] mmc: sdhci-esdhc-imx: fix the mask for tuning start point | expand |
On Tue, 26 May 2020 at 12:32, <haibo.chen@nxp.com> wrote: > > From: Haibo Chen <haibo.chen@nxp.com> > > According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is > TUNING_START_TAP, bit[7] of this register is to disable the command > CRC check for standard tuning. So fix it here. > > Fixes: d87fc9663688 ("mmc: sdhci-esdhc-imx: support setting tuning start point") > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Applied for next, thanks! Should we add a stable tag or it doesn't matter? Kind regards Uffe > --- > drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index 7af9d87d4245..2cf7fa59270e 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -90,7 +90,7 @@ > #define ESDHC_STD_TUNING_EN (1 << 24) > /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ > #define ESDHC_TUNING_START_TAP_DEFAULT 0x1 > -#define ESDHC_TUNING_START_TAP_MASK 0xff > +#define ESDHC_TUNING_START_TAP_MASK 0x7f > #define ESDHC_TUNING_STEP_MASK 0x00070000 > #define ESDHC_TUNING_STEP_SHIFT 16 > > -- > 2.17.1 >
On 2020-05-26 06:22, haibo.chen@nxp.com wrote: > According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is > TUNING_START_TAP, bit[7] of this register is to disable the command > CRC check for standard tuning. So fix it here. Which RM? I just checked imx6sl, imx7s and imx8mm reference manuals and they all show bits 7~0 is for TUNING_START_TAP. I have been experiencing some infrequent hard to reproduce communication errors with an SDIO WiFi module on imx8mm and wondered if this could be related. For example: ath10k_sdio mmc2:0001:1: failed to write to address 0x129ec: -84 Kevin
> -----Original Message----- > From: Kevin Groeneveld <kgroeneveld@lenbrook.com> > Sent: 2022年12月2日 1:34 > To: Bough Chen <haibo.chen@nxp.com>; adrian.hunter@intel.com; > ulf.hansson@linaro.org; linux-mmc@vger.kernel.org > Cc: dl-linux-imx <linux-imx@nxp.com>; shawnguo@kernel.org; > s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; > Aisheng Dong <aisheng.dong@nxp.com>; Y.B. Lu <yangbo.lu@nxp.com> > Subject: Re: [PATCH 1/2] mmc: sdhci-esdhc-imx: fix the mask for tuning start > point > > On 2020-05-26 06:22, haibo.chen@nxp.com wrote: > > According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is > > TUNING_START_TAP, bit[7] of this register is to disable the command > > CRC check for standard tuning. So fix it here. > > Which RM? I just checked imx6sl, imx7s and imx8mm reference manuals and > they all show bits 7~0 is for TUNING_START_TAP. Please refer to the latest imx93 RM, I just confirm that this RM already correct this info. > > I have been experiencing some infrequent hard to reproduce communication > errors with an SDIO WiFi module on imx8mm and wondered if this could be > related. This should related to the auto tuning bit setting, usdhc has an IC bug of the auto tuning method for SDIO device which has a interrupt input. Please refer to https://patchwork.kernel.org/project/linux-mmc/patch/1629285415-7495-4-git-send-email-haibo.chen@nxp.com/ I will continue to upstream this these weeks. Best Regards Haibo Chen > > For example: > ath10k_sdio mmc2:0001:1: failed to write to address 0x129ec: -84 > > > Kevin
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 7af9d87d4245..2cf7fa59270e 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -90,7 +90,7 @@ #define ESDHC_STD_TUNING_EN (1 << 24) /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ #define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff +#define ESDHC_TUNING_START_TAP_MASK 0x7f #define ESDHC_TUNING_STEP_MASK 0x00070000 #define ESDHC_TUNING_STEP_SHIFT 16