mbox series

[0/2] Add support for CPUCP mailbox controller

Message ID 20221213140409.772-1-quic_sibis@quicinc.com (mailing list archive)
Headers show
Series Add support for CPUCP mailbox controller | expand

Message

Sibi Sankar Dec. 13, 2022, 2:04 p.m. UTC 
Add support for CPUSS Control Processor (CPUCP) mailbox controller
which enables communication between AP and CPUCP by acting as a
doorbell between them.

Sibi Sankar (2):
  dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller
  mailbox: Add support for QTI CPUCP mailbox controller

 .../bindings/mailbox/qcom,cpucp-mbox.yaml          |  51 ++++++
 drivers/mailbox/Kconfig                            |   9 ++
 drivers/mailbox/Makefile                           |   2 +
 drivers/mailbox/qcom-cpucp-mbox.c                  | 176 +++++++++++++++++++++
 4 files changed, 238 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
 create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c

Comments

Sibi Sankar Dec. 13, 2022, 2:09 p.m. UTC | #1 
Additional patches got tagged along. Please ignore.

On 12/13/22 19:34, Sibi Sankar wrote:
> Add support for CPUSS Control Processor (CPUCP) mailbox controller
> which enables communication between AP and CPUCP by acting as a
> doorbell between them.
> 
> Sibi Sankar (2):
>    dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller
>    mailbox: Add support for QTI CPUCP mailbox controller
> 
>   .../bindings/mailbox/qcom,cpucp-mbox.yaml          |  51 ++++++
>   drivers/mailbox/Kconfig                            |   9 ++
>   drivers/mailbox/Makefile                           |   2 +
>   drivers/mailbox/qcom-cpucp-mbox.c                  | 176 +++++++++++++++++++++
>   4 files changed, 238 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>   create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
>